Many RISC-V Improvements Ready For Linux 5.5: M-Mode, SECCOMP, Other Features
The RISC-V kernel code has some interesting changes ready for Linux 5.5.
Among the RISC-V changes for the in-development Linux 5.5 kernel include:
- M-Mode support, which is the highest privilege mode for RISC-V and typically reserved for the system firmware. The M-Mode has access to all resource and interrupts while normally RISC-V kernels run in the lower S-Mode privilege level. The motivation for the M-Mode kernel support appears to be CPU-level interrupt controller functionality.
- SECCOMP secure computing mode support now works on RISC-V.
- "nommu" support to run without MMU-based memory management support enabled/working.
- Support for running with SBI (Supervisor Binary Interface) mode disabled due to those calls being expensive.
- TLB flush optimizations by doing local TLB flushes when possible rather than SBI-based flushes that are more expensive.
- The kernel now passes the complete RISC-V ISA string to user-space rather than redacting parts of it.
- The kernel Makefile for RISC-V now supports BZ2 / LZ4 / LZMA / LZO kernel image compression formats similar to what is supported for other CPU architectures.
The complete list of RISC-V architecture changes via this pull request.
Among the RISC-V changes for the in-development Linux 5.5 kernel include:
- M-Mode support, which is the highest privilege mode for RISC-V and typically reserved for the system firmware. The M-Mode has access to all resource and interrupts while normally RISC-V kernels run in the lower S-Mode privilege level. The motivation for the M-Mode kernel support appears to be CPU-level interrupt controller functionality.
- SECCOMP secure computing mode support now works on RISC-V.
- "nommu" support to run without MMU-based memory management support enabled/working.
- Support for running with SBI (Supervisor Binary Interface) mode disabled due to those calls being expensive.
- TLB flush optimizations by doing local TLB flushes when possible rather than SBI-based flushes that are more expensive.
- The kernel now passes the complete RISC-V ISA string to user-space rather than redacting parts of it.
- The kernel Makefile for RISC-V now supports BZ2 / LZ4 / LZMA / LZO kernel image compression formats similar to what is supported for other CPU architectures.
The complete list of RISC-V architecture changes via this pull request.
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