AVX-512 CPU Support Added To Linux 3.15 Kernel
Support for the latest Advanced Vector Extensions will be supported by the next Linux kernel release.
Landing today alongside the EFI mixed mode support as an early change in the Linux 3.15 kernel merge window is support for AVX-512.
AVX-512 are 512-bit extensions to the 256-bit AVX SIMD instructions. CPUs supporting AVX-512 will not come until next year with the introduction of Intel's Knights Landing. AVX-512 has 32 vector registers that are 512-bit wide and supports 512-bit operations on packed floating point and integer data. AVX-512 also has a new EVEX coding scheme over AVX1/AVX2. Initial AVX-512 work landed today with the x86 CPU pull with this merge, along with many other changes.
When it comes to compiler support for AVX-512 vector instructions, there's ongoing work both within LLVM and GCC.
Landing today alongside the EFI mixed mode support as an early change in the Linux 3.15 kernel merge window is support for AVX-512.
AVX-512 are 512-bit extensions to the 256-bit AVX SIMD instructions. CPUs supporting AVX-512 will not come until next year with the introduction of Intel's Knights Landing. AVX-512 has 32 vector registers that are 512-bit wide and supports 512-bit operations on packed floating point and integer data. AVX-512 also has a new EVEX coding scheme over AVX1/AVX2. Initial AVX-512 work landed today with the x86 CPU pull with this merge, along with many other changes.
When it comes to compiler support for AVX-512 vector instructions, there's ongoing work both within LLVM and GCC.
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