RISC-V's Linux Kernel Support Is Getting Into Good Shape, Userspace Starting To Work

Written by Michael Larabel in RISC-V on 19 August 2018 at 08:06 AM EDT. 2 Comments
The RISC-V open-source processor ISA support within the mainline kernel is getting into good shape, just a few releases after this new architecture port was originally added to the Linux Git tree.

The RISC-V code for Linux 4.19 includes the ISA-mandated timers and first-level interrupt controllers, which are needed to actually get user-space up and running. Besides the RISC-V first-level interrupt controller, Linux 4.19 also adds support for SiFive's platform-level interrupt controller that interfaces with the actual devices.

In addition to that important code, there are also build fixes, clean-ups to some of the code, ptrace fixes, early printk support, and a fix to their early debug trap handler.

With these RISC-V patches for Linux 4.19, the code was recently tested to be able to boot Fedora's root file-system on QEMU as well as recently booting the HiFive Unleashed RISC-V developer board.

Western Digital, one of the major vendors being quick to get behind RISC-V, was among the contributors to getting the timers and interrupt controller code into shape. The complete list of RISC-V patches for Linux 4.19 can be found here.
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Michael Larabel is the principal author of Phoronix.com and founded the site in 2004 with a focus on enriching the Linux hardware experience. Michael has written more than 20,000 articles covering the state of Linux hardware support, Linux performance, graphics drivers, and other topics. Michael is also the lead developer of the Phoronix Test Suite, Phoromatic, and OpenBenchmarking.org automated benchmarking software. He can be followed via Twitter, LinkedIn, or contacted via MichaelLarabel.com.

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