MIPS P5600 Support Added To The LLVM Compiler Stack
Written by Michael Larabel in LLVM on 29 September 2015 at 11:58 AM EDT. 1 Comment
LLVM --
The MIPS P5600 processor is now supported by LLVM thanks to a now-merged patch from Imagination Technologies.

The P5600 is the MIPS chip that last year set a new record for single-threaded CPU performance among licensable CPUs. The P5600 is part of Imagination's Warror P-class for "ultimate performance" in mobile and embedded applications. The P5600 is based on the MIPSr5 architecture and is 32-bit with a 128-bit SIMD engine, full hardware virtualization, and features a 16-stage pipeline.

The P5600 is also found within Russia's Baikal chip where it's in a dual-core design running at 1.2GHz.

While the P5600 support was just added to LLVM, it's been supported in the GNU Compiler Collection since GCC 5. The P5600 seems like a rather nice MIPS design and would be nice to see it in some development board or other non-Android Linux device for benchmarking.
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