Linux 6.10 Adding Intel Low-Latency Hint To Aggressively Boost GT Frequency For GPU Compute
Following the big set of Xe DRM driver updates for Linux 6.10 and earlier Adaptive Snyc SDP, Lunar Lake display support, and more DG2 PCI IDs for i915 pulls sent in over weeks prior for this next kernel version, the drm-intel-gt-next pull request was submitted today for last minute Intel graphics driver feature changes aiming for Linux 6.10.
Most significant with today's drm-intel-gt-next is adding support for context hints to influence the GT frequency. Modern Intel integrated and discrete graphics with the GuC micro-controller support the notion of context hints. With the low-latency context hint being added for Linux 6.10, it can be set for GPU compute workloads to help get the GPU performance boosted aggressively to deliver lower latency results for GPU compute work that is typically latency sensitive.
There is currently branched Mesa code for making use of the "I915_CONTEXT_PARAM_LOW_LATENCY" low latency hint. This low-latency GuC strategy can be enabled with the "force_low_latency" DRIRC option for latency-sensitive apps/software. This low-latency hint will work with all modern Intel graphics using GuC.
Today's drm-intel-gt-next pull also has a big workaround for DG2/Alchemist graphics. The workaround is to enable only one CCS for compute workloads as a result of a hardware bug. The merge request explains:
The pull request also has some other Intel graphics workarounds for Linux 6.10 and other fixes.
Most significant with today's drm-intel-gt-next is adding support for context hints to influence the GT frequency. Modern Intel integrated and discrete graphics with the GuC micro-controller support the notion of context hints. With the low-latency context hint being added for Linux 6.10, it can be set for GPU compute workloads to help get the GPU performance boosted aggressively to deliver lower latency results for GPU compute work that is typically latency sensitive.
There is currently branched Mesa code for making use of the "I915_CONTEXT_PARAM_LOW_LATENCY" low latency hint. This low-latency GuC strategy can be enabled with the "force_low_latency" DRIRC option for latency-sensitive apps/software. This low-latency hint will work with all modern Intel graphics using GuC.
Today's drm-intel-gt-next pull also has a big workaround for DG2/Alchemist graphics. The workaround is to enable only one CCS for compute workloads as a result of a hardware bug. The merge request explains:
"drm/i915/gt: Enable only one CCS for compute workload
Enable only one CCS engine by default with all the compute slices allocated to it.
While generating the list of UABI engines to be exposed to the user, exclude any additional CCS engines beyond the first instance.
NOTE: This W/A will make all DG2 SKUs appear like single CCS SKUs by default to mitigate a hardware bug. All the EUs will still remain usable, and all the userspace drivers have been confirmed to be able to dynamically detect the change in number of CCS engines and adjust.
For the smaller percent of applications that get perf benefit from letting the userspace driver dispatch across all 4 CCS engines we will be introducing a sysfs control as a later patch to choose 4 CCS each with 25% EUs (or 50% if 2 CCS)."
The pull request also has some other Intel graphics workarounds for Linux 6.10 and other fixes.
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