Mesa Vulkan Drivers Get A Common Dispatch Framework For Better Code Sharing

Written by Michael Larabel in Mesa on 2 February 2021 at 08:00 AM EST. 6 Comments
Mesa 21.1 has merged a common dispatch framework for use by Vulkan drivers to allow for better code sharing and the possibility of some Vulkan extensions to be more easily supported across all drivers.

Up to now all five Mesa Vulkan drivers (Intel ANV, Radeon RADV, Broadcom V3DV, Freedreno TURNIP, and Lavapipe) all of them have had their own slightly modified version of Intel's entrypoint generator script. Intel ANV lead developer Jason Ekstrand has taken now to avoiding this unnecessary code duplication between drivers and finally working towards a unified Vulkan entry points setup.

He explained in the now-merged MR, "
This commit adds new vk_instance and vk_physical_device base structs and moves all the extension and entrypoint handling code from ANV into them. Drivers provide dispatch tables and tables of supported extensions at init time and the core code takes care of the rest. It handles extension verification, filling out dispatch tables, and provides helpers for implementing Get*ProcAddr.

Besides unifying things and avoiding unnecessary code duplication, the work also shows how there can be "100% common implementations" of certain Vulkan extensions where all the driver has to do is advertise the support for the common extension. Those common Vulkan extensions would be just for select functionality not relying upon hardware specific wiring, such as VK_EXT_debug_report and VK_deferred_host_operations, among others and surely more in the future.

Already at this stage the unifying to a common dispatch framework for Vulkan drivers has lightened the codebase by more than two thousand lines of code (+3.3k, -5.9k). Great seeing the unification take place now and hopefully allow for more code sharing moving forward. This should also help out in the bring-up of new Vulkan drivers in the future like if finally seeing a Nouveau Vulkan driver or for other embedded graphics processors.
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