OpenMP 4.0 Offloading For Intel MIC Lands In GCC 5
GCC 5 seems to be getting more exciting by the day! The latest feature being piled onto GCC 5 for release next year is OpenMP 4.0 offloading support to target Intel MIC platforms.
The Intel Many Integrated Core (MIC) Architecture is the company's co-processor computer architecture with the products out so far based on it being the Xeon Phi family that offer up ~50+ x86 cores on a PCI Express card.
With today's GCC code activity, libmicoffload was added to GCC, the libgomp plug-in support, and other changes (4 patches total so far) for supporting GCC OpenMP 4.0 offloading to Intel MIC platforms. This has been ongoing work for several months for GCC and finally today the landing occurred.
Separate but parallel to this has been the GCC infrastructure work for supporting OpenMP 4.0 offloading to support targets like the Intel MIC, various accelerators, FPGAs, and GPUs. Offloading support to targets besides CPUs was one of the big features of OpenMP 4.
For those interested in the Intel MIC devices, the Xeon Phi is being sold super cheap until the end of the year.
The Intel Many Integrated Core (MIC) Architecture is the company's co-processor computer architecture with the products out so far based on it being the Xeon Phi family that offer up ~50+ x86 cores on a PCI Express card.
With today's GCC code activity, libmicoffload was added to GCC, the libgomp plug-in support, and other changes (4 patches total so far) for supporting GCC OpenMP 4.0 offloading to Intel MIC platforms. This has been ongoing work for several months for GCC and finally today the landing occurred.
Separate but parallel to this has been the GCC infrastructure work for supporting OpenMP 4.0 offloading to support targets like the Intel MIC, various accelerators, FPGAs, and GPUs. Offloading support to targets besides CPUs was one of the big features of OpenMP 4.
For those interested in the Intel MIC devices, the Xeon Phi is being sold super cheap until the end of the year.
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