Open-Source Compiler Support Starts Riding Down For Intel's Sapphire Rapids
Intel's Sapphire Rapids is the Icelake successor not looking to be released until 2021 but thankfully the open-source compiler support is already seeing initial work on enabling the new instruction set extensions.
This week the first new instruction set additions have landed into both the GCC and LLVM compilers for bits being introduced with Sapphire Rapids. The main addition is ENQCMD, an instruction disclosed by this month's architecture instruction set extensions programming reference guide.
ENQCMD is for Enqueue Stores that allows for writing commands to enqueue registers that act as special devices for using memory mapped I/O (MMIO). Related is also ENQCMDS as the Enqueue Command Supervisor. These instructions are outlined as part of the programming reference guide.
Support for ENQCMD was added to GCC Git making it part of next year's GCC 10 release. Hitting the LLVM code this morning was the ENQCMD instructions for LLVM 9.0, which will debut around September.
The Enqueue Stores is the only currently public new instructions for Sapphire Rapids. We'll see over the months ahead what new instructions may also be disclosed. It's great seeing this support arrive earlier especially given the annual release cadence of the GNU Compiler Collection. For Cascadelake the support arrived a bit late with GCC 9.0 arriving around the same time as the Cascadelake launch event, so it's great to see Intel engineers getting back on their punctual train of seeing new instructions / microarchitectures supported by the leading code compilers well ahead of the new processor introductions. Intel has been generally very good in this regard about seeing proven support well ahead of launch albeit with a few slip-ups lately so at least the software stream is taking shape early for Sapphire Rapids.
This week the first new instruction set additions have landed into both the GCC and LLVM compilers for bits being introduced with Sapphire Rapids. The main addition is ENQCMD, an instruction disclosed by this month's architecture instruction set extensions programming reference guide.
ENQCMD is for Enqueue Stores that allows for writing commands to enqueue registers that act as special devices for using memory mapped I/O (MMIO). Related is also ENQCMDS as the Enqueue Command Supervisor. These instructions are outlined as part of the programming reference guide.
Support for ENQCMD was added to GCC Git making it part of next year's GCC 10 release. Hitting the LLVM code this morning was the ENQCMD instructions for LLVM 9.0, which will debut around September.
The Enqueue Stores is the only currently public new instructions for Sapphire Rapids. We'll see over the months ahead what new instructions may also be disclosed. It's great seeing this support arrive earlier especially given the annual release cadence of the GNU Compiler Collection. For Cascadelake the support arrived a bit late with GCC 9.0 arriving around the same time as the Cascadelake launch event, so it's great to see Intel engineers getting back on their punctual train of seeing new instructions / microarchitectures supported by the leading code compilers well ahead of the new processor introductions. Intel has been generally very good in this regard about seeing proven support well ahead of launch albeit with a few slip-ups lately so at least the software stream is taking shape early for Sapphire Rapids.
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