Intel ISPC 1.19 Released With Sapphire Rapids Support, Data Center GPU Max
Making its debut today as their latest open-source project receiving optimizations for 4th Gen Xeon Scalable "Sapphire Rapids" processors, Intel has rolled out ISPC 1.19 as their Implicit SPMD Program Compiler.
Intel ISPC is the company's long-active compiler effort for supporting a variant of C with specialized extensions for simple program, multiple data (SPMD) programming. SPMD is one of the ways Intel promotes for leveraging the SIMD capabilities of not only their CPUs but also growing field of GPUs. The Intel ISPC compiler supports AVX-512 along with earlier AVX variants as well as SSE4 and even for Arm usage supports NEON.
Intel ISPC 1.19 has official support for 4th Gen Xeon Scalable "Sapphire Rapids" via new "avx512spr-*" targets with native AVX-512 FP16 support. There is also support for Intel Data Center GPU Max "Ponte Vecchio" via the new "pvr" target. Additionally, the acm-g10 / acm-g11 / acm-g12 targets are now present for Arc Graphics to replace the earlier dg2 target.
ISPC 1.19 also now has AArch64 target support for its Windows build, support for the __regcall attribute with the ISPC compiler, a new "invoke_sycl" construct to call SYCL functions from ISPC, support for extern C functions definitions, and various ISPC run-time improvements.
ISPC 1.19 should also be much faster for running on Intel Xe graphics targets thanks to enhancements to the ISPC optimization pipeline and a new spill-cost IGC graphics compiler finalizer function to reduce spilling.
Downloads and more details on the Intel ISPC 1.19 release via GitHub.
Intel ISPC is the company's long-active compiler effort for supporting a variant of C with specialized extensions for simple program, multiple data (SPMD) programming. SPMD is one of the ways Intel promotes for leveraging the SIMD capabilities of not only their CPUs but also growing field of GPUs. The Intel ISPC compiler supports AVX-512 along with earlier AVX variants as well as SSE4 and even for Arm usage supports NEON.
Intel ISPC 1.19 has official support for 4th Gen Xeon Scalable "Sapphire Rapids" via new "avx512spr-*" targets with native AVX-512 FP16 support. There is also support for Intel Data Center GPU Max "Ponte Vecchio" via the new "pvr" target. Additionally, the acm-g10 / acm-g11 / acm-g12 targets are now present for Arc Graphics to replace the earlier dg2 target.
ISPC 1.19 also now has AArch64 target support for its Windows build, support for the __regcall attribute with the ISPC compiler, a new "invoke_sycl" construct to call SYCL functions from ISPC, support for extern C functions definitions, and various ISPC run-time improvements.
ISPC 1.19 should also be much faster for running on Intel Xe graphics targets thanks to enhancements to the ISPC optimization pipeline and a new spill-cost IGC graphics compiler finalizer function to reduce spilling.
Downloads and more details on the Intel ISPC 1.19 release via GitHub.
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