AMD RDNA3 GPUs Can Have A Lot More Vector Registers Than RDNA2
A code commit that was merged to LLVM's AMDGPU shader compiler back-end on Friday afternoon confirms that GFX11/RDNA3 GPUs can have a lot more vector registers than prior GFX10 (RDNA / RDNA2) GPUs.
An AMD engineer prepared a new feature "FeatureGFX11FullVGPRs" for their AMDGPU shader compiler back-end in mainline LLVM. The description explains;
A 50% increase in the physical vector general purpose registers (VGPRs) is a big deal. Optimizing for optimal VGPR usage / lowering VGPR register pressure is a common shader optimization strategy for performance while having a 50% increase in the number of registers will certainly help in easing the pressure.
As part of the commit, the feature with today's LLVM upstream change is set for GFX 11.0.0 and 11.0.1 ISAs but not the 11.0.2 and 11.0.3 ISAs, which either will be set later or those targets are for a cut-down version of the RDNA3 GPUs, or similar difference/segmentation.
See this commit for the FeatureGFX11FullVGPRs addition to LLVM.
An AMD engineer prepared a new feature "FeatureGFX11FullVGPRs" for their AMDGPU shader compiler back-end in mainline LLVM. The description explains;
GFX11 with 50% more physical VGPRs and 50% larger allocation granule than GFX10.
A 50% increase in the physical vector general purpose registers (VGPRs) is a big deal. Optimizing for optimal VGPR usage / lowering VGPR register pressure is a common shader optimization strategy for performance while having a 50% increase in the number of registers will certainly help in easing the pressure.
As part of the commit, the feature with today's LLVM upstream change is set for GFX 11.0.0 and 11.0.1 ISAs but not the 11.0.2 and 11.0.3 ISAs, which either will be set later or those targets are for a cut-down version of the RDNA3 GPUs, or similar difference/segmentation.
See this commit for the FeatureGFX11FullVGPRs addition to LLVM.
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