New RISC-V Kernel Features Ready For Linux 6.6

Palmer Dabbelt sent out the initial batch of RISC-V processor architecture updates for the Linux 6.6 kernel port.

As usual there is a lot happening in the RISC-V space with continuing to enable additional kernel functionality as the processor port steps closer to reaching parity with more mature ports like AArch64 and x86_64. Some of the RISC-V highlights for Linux 6.6 include:

- Support for Kernel Control Flow Integrity (KCFI) on RISC-V for this security feature that was revamped in the kernel last year.

- Support for new "riscv,isa-extensions" and "riscv,isa-base" DeviceTree interfaces for probing RISC-V CPU extensions.

- Broader instruction coverage within KProbes.

- Support for user-space access to RISC-V performance counters.

- Crash kernels can be allocated above the 4GiB mark.

- Support for ELFs in non-MMU configurations.

- The mmap() handling now defaults to sv48-sized addresses while longer addresses are hidden behind a hint to match the behavior of Intel and Arm. Some applications already assume sv48 is the default address space rather than the existing default of sv39.

This first batch of RISC-V updates for Linux 6.6 are detailed via this pull request.

Not related to today's RISC-V pull request but significant on the RISC-V front for Linux 6.6 is the DRM updates... The AMDGPU DC code can now build on RISC-V as a step forward for those wanting to use a modern AMD Radeon graphics cards with a connected display/monitor on RISC-V.