MIPS Claims "Best-In-Class Performance" With New RISC-V eVocore CPUs

Written by Michael Larabel in RISC-V on 10 May 2022 at 12:20 PM EDT. 36 Comments
RISC-V
MIPS Tech is no longer working on their MIPS CPU instruction set architecture but has been taking on RISC-V based designs. Today the company made the bold announcement for their new eVocore P8700 and I8500 multiprocessor IP cores that they offer "Best-In-Class Performance and Scalability."

MIPS Tech with their RISC-V based designs is aiming for the "high performance segment of the processor market" and sings many praise these days over this open-source processor ISA.


MIPS


With the new MIPS eVocore P8700 they are referring to it as offering "superscalar performance" and is said to be able to scale up to 64 clusters, 512 cores, and 1024 harts/threads. The eVocore P8700 is expected to be available in Q4.


MIPS


The eVocore I8500 meanwhile is their efficiency offering that they says will be best-in-class power efficiency for SoC applications.

We'll see how MIPS' claims pan out in time but for now those interested in today's announcements can visit MIPS.com.
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Michael Larabel is the principal author of Phoronix.com and founded the site in 2004 with a focus on enriching the Linux hardware experience. Michael has written more than 20,000 articles covering the state of Linux hardware support, Linux performance, graphics drivers, and other topics. Michael is also the lead developer of the Phoronix Test Suite, Phoromatic, and OpenBenchmarking.org automated benchmarking software. He can be followed via Twitter, LinkedIn, or contacted via MichaelLarabel.com.

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