AMDGPU Driver Gets Patches Enabling Two More Interrupt Rings On Vega 10

While AMD's open-source Linux driver developers have been busy on bringing up Vega 20 support as well as Picasso APUs, they aren't done yet optimizing their Vega 10 support.

Published today were a set of 12 patches that enable two more IH rings for interrupt handling with the Vega 10 hardware. Up to now there's just been the main interrupt ring programmed by the AMDGPU driver and these two other rings left uninitialized.

The patches don't provide much context for these two extra interrupt rings now being enabled for Vega 10. When inquiring about these 12 new patches, in the long-term they may provide some performance benefits as future patches could provide smarter logic around buffer placement, etc.

It is also worth noting that these two IH rings on Vega 10 and newer are also used by the HBCC (High Bandwidth Cache Controller) support with the AMD Windows driver.

We'll see if this enablement of the additional IH rings lands in time for the upcoming 4.20~5.0 cycle or is delayed another cycle, but there isn't much immediate rush anyhow without further yet-to-be-written patches building upon the support.