Initial AMD Zen 4 Enablement Lands In LLVM Clang 16.0
At the end of November AMD finally posted their initial Zen 4 LLVM patch to introduce the "znver4" target and enabling the new instructions found with Zen 4 Ryzen and EPYC processors. While the new ISAs are added, sadly it lacks any tuned scheduler model yet (for now just reusing the Zen 3 tuning) for Zen 4 but is said to be coming later.
Using -march=znver4 to target compiling software for Zen 4 flips on AVX-512, CDI, DQI, eBWI, VLX, BMI, BMI2, IFMA, VNNI, BITALG, GFNI, BF16, SHSTK, and VPOPCNTDQ as the new ISA compiler features over Zen 3. This initial but basic compiler support is similar to the initial Znver4 code in GCC that landed in October. At least since that point SUSE engineers have been working on some tuning patches and should be merged in time for GCC 13.1. Hopefully the LLVM tuning for Zen 4 will follow in short-order.
The initial Znver4 support landed via this commit. Now that it's merged it will be present for introduction in LLVM 16.0 that will likely be released around March if usual release traditions hold true. We'll see what more tuning/optimizations come prior to that point. Once the LLVM and GCC support for Zen 4 matures a bit I will be around with some fresh Ryzen 7000 series and 4th Gen EPYC "Genoa" compiler benchmarks. It's too bad that the LLVM enablement didn't land sooner especially with the AMD Optimizing C/C++ Compiler being derived from LLVM.
For now at least the best Zen 4 tuned compiler support is by way of AMD's AOCC 4.0 compiler.