Initial AMD Zen 4 Support Patch Under Review For LLVM/Clang

Following the initial AMD Zen 4 "znver4" target for GCC 13 that was published and merged in October (and now a SUSE engineer working on providing actually tuned support and accurate cost tables), an initial AMD Zen 4 patch for the LLVM/Clang compiler was published a few days ago.

An initial enablement patch for AMD Zen 4 with LLVM/Clang was published by an AMD engineer for going upstream in the open-source LLVM codebase. The patch enables Zen 4 detection based on the Family 19h models, supports -march=znver4 targeting, and flips on the new ISA capabilities of the Zen 4 processors. Most notably, it gets all the relevant AVX-512 additions flipped on.

Sadly, however, this belated LLVM patch is reusing the existing Zen 3 scheduler model and that AMD says they will "update this later" for an actual new Zen 4 scheduler model. This is like the initial Zen 4 support for GCC that it's not properly tuned for the Zen 4 microarchitecture changes but will come at some point in the future -- weeks or months later, at least going by past turnaround times with their belated compiler tuning for new CPUs.

It's even more unfortunate on the LLVM side the belated work considering they last month released AOCC 4.0 as their updated AMD Optimizing C/C++ Compiler. That AOCC 4.0 release is tuned for Zen 4 and has shown to deliver some nice compiler uplift. AOCC is based on LLVM/Clang but is a binary-only release and beyond the initial LLVM patch they haven't yet offered any additional Zen 4 patches for review to go upstream... Presumably still stuck clearing AMD's internal processes to get open-source patches published or whatever other internal reasons.

With the initial Zen 4 patch under review, the first code review comment began with, "Thank you [AMD engineer] I thought you'd forgotten about LLVM :)" The upstream code review went on to suggest that rather than leveraging the Zen 3 scheduler model, Zen 4 may be better off reusing one of Intel's newer CPU scheduler models. Intel's scheduler models at least take AVX-512 into account that is new with Zen 4, at least until AMD is able to publish their own proper scheduler model for these new Ryzen 7000 series and EPYC 9004 series processors.

This might sound strange - but its probably better to use either the IceLake or SkylakeServer model initially - as they have AVX512 instruction coverage, the znver3 model will assert in llvm-mca etc when it encounters an unsupported instruction (any of the Z sched classes).

For now this initial Znver4 patch is still undergoing review ahead of mainlining. Assuming the initial patch is ready to go in the coming weeks, this initial Zen 4 support will be found in LLVM 16.0 that should end up going stable around March. Hopefully AMD will be able to get out their tuned Zen 4 open-source compiler support sooner rather than later while for now the best compiler support for Zen 4 Ryzen/EPYC CPUs is with the AOCC 4.0 binary.