hipSYCL Sees Work-In-Progress Support For Intel oneAPI Level Zero Backend

Written by Michael Larabel in Intel on 5 March 2021 at 12:00 AM EST. 12 Comments
hipSYCL, the innovative implementation of Khronos' SYCL for targeting CPUs and GPUs by integrating with existing toolchains, is seeing work on supporting Intel oneAPI Level Zero for running directly off Intel graphics hardware.

The open-source hipSYCL project already supports SYCL CPU-based execution via OpenMP, targeting NVIDIA GPUs using CUDA, and targeting AMD Radeon graphics using HIP/ROCm. Now with a new work-in-progress back-end is support for Intel graphics using Level Zero. The hipSYCL project is one of several SYCL implementations aiming to support various CPUs and GPUs/accelerators while so far it's been one of the most diverse. The hipSYCL project supports most of SYCL 2020 at present.

hipSYCL in its current position prior to merging Intel L0 support.

The current Intel Level Zero back-end for hipSYCL was devised by Aksel Alpay of Heidelberg University. It is currently "highly experimental" but the basics should be working while still to be handled is local memory, group algorithms, reductions, and other features. The SPIR-V compilation for this back-end is handled using the Clang SYCL front-end.

More details on this notable hipSYCL work can be found via this pull request. While still experimental, the hope is to begin merging the code sooner rather than later.
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