Linux 6.9 Adds New RISC-V Vector-Accelerated Crypto Routines

Written by Michael Larabel in RISC-V on 22 March 2024 at 12:53 PM EDT. 4 Comments
RISC-V
The RISC-V architecture updates were sent out today for the in-development Linux 6.9 kernel ahead of the v6.9-rc1 release this Sunday.

RISC-V with Linux 6.9 implements support for more vector-accelerated crypto routines. Among the work is RISC-V vector accelerated AES-{ECB,CBC,CTR,XTS}, ChaCha20, GHASH, SHA-256, SHA-384, SHA-512, SM3, and SM4 algorithms.

StarFive VisionFive 2 RISC-V board


The new kernel on RISC-V also now enables system hibernation support for portable kernel builds, fast GUP handling, support for membarrier-based instruction cache synchronization, ACPI LPI and CPPC support, and other additions.
RISC-V Patches for the 6.9 Merge Window

* Support for various vector-accelerated crypto routines.
* Hibernation is now enabled for portable kernel builds.
* mmap_rnd_bits_max is larger on systems with larger VAs.
* Support for fast GUP.
* Support for membarrier-based instruction cache synchronization.
* Support for the Andes hart-level interrupt controller and PMU.
* Some cleanups around unaligned access speed probing and Kconfig settings.
* Support for ACPI LPI and CPPC.
* Various cleanus related to barriers.
* A handful of fixes.

The full list of RISC-V patches for Linux 6.9 can be found via this pull request.
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