Linux 6.12 EDAC Prepares For Address Translation On Future AMD Platforms

Written by Michael Larabel in AMD on 16 September 2024 at 05:00 AM EDT. Add A Comment
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The Error Detection And Correction (EDAC) driver updates were among the early pull requests submitted for the Linux 6.12 kernel cycle in advance of this week's Linux Kernel Maintainer Summit in Austria. Among the EDAC work this cycle is preparing memory address translation support for future AMD platforms.

With these code updates for Linux 6.12 is the ability on future AMD platforms for translating normalized error addresses into system physical addresses using UEFI Platform Runtime Mechanism (PRM) support. The prior patches for this AMD PRM handling for EDAC explains:
"Platform Runtime Mechanism (PRM) introduces a means for the AML interpreter and OS drivers to invoke runtime handlers from platform firmware in order to remove the need for certain classes of SMIs.
...
Future AMD platforms will implement a PRM module in firmware that will include handlers for performing various types of address translation. The address translation PRM module is documented in chapter 22 of the publicly available "AMD Family 1Ah Models 00h–0Fh and Models 10h–1Fh ACPI v6.5 Porting Guide".

While the kernel currently has support for calling PRM handlers from the AML interpreter, it does not support calling PRM handlers directly from OS drivers. This series implements the direct call interface and uses it for translating normalized addresses to system physical addresses."

With the Family 1Ah documentation being mentioned, this PRM support for error addresses to system physical addresses is likely for use with upcoming AMD EPYC "Turin" Zen 5 servers.

The EDAC updates for Linux 6.12 also fix an issue on the Intel side for older Elkhart Lake nad Ice Lake platforms where the system address is above the top-of-memory address. The old PPC4xx_EDAC driver is also removed since that older PowerPC platform support was previously removed from the mainline Linux kernel. Error injection for Zynq UltraScale+ platforms have also been fixed.

DDR5 memory


More details for those interested via this pull.
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