Linux 5.5 To Enable Intel's 5-Level Paging Support By Default
Using 5-level paging increases the virtual address space from 256 TiB to 128 PiB and the physical address space from 64 TiB to 4 PiB. Intel's 5-level paging works by extending the size of virtual addresses from 48 to 57 bits.
The Linux kernel 5-level paging support has settled down and is now mature enough to flip on by default. One of the reasons that has held up the 5-level paging by default was due to performance regressions with this code enabled, but they seem to be addressed for Linux 5.5. The performance concerns were both for 5-level code on 4-level hardware and 5-level paging on 5-level hardware when the greater extended physical/virtual address space isn't needed.
On the hardware side, 5-level paging will work with Intel Xeon Scalable "Ice Lake" server processors and beyond.
Sent in as part of the x86/mm (memory management) changes for the Linux 5.5 merge window is now enabling CONFIG_X86_5LEVEL by default. Should any performance issues remain, they will hopefully be quickly squashed as the next round of Linux distribution kernels are all expected to ship with this feature enabled in order to accommodate next-generation Intel servers with growing amounts of memory.