Intel Working On 5-Level Paging To Increase Linux Virtual/Physical Address Space
Upcoming Intel hardware supports 5-level paging, which is an extension to the page table structure by adding another layer of translation. With 5-level paging the virtual address space goes from a 256 TiB maximum to 128 PiB while the physical address space threshold goes from 64 TiB to 4 PiB.
This big set of patches to increase the virtual/physical address space capabilities of the Linux kernel for future Intel x86_64 hardware can currently be found via this kernel mailing list thread. Intel's 5-level paging design is explained in more detail via this PDF white paper.