Linux 5.20 Intel Graphics Driver Begins Wiring Up For Ponte Vecchio, Resume Speed Faster
Intel has sent in their latest batch of drm-intel-gt-next changes to DRM-Next of their i915 kernel graphics driver changes targeting Linux 5.20. In addition to a lot of code churn still around DG2/Alchemist, the open-source Intel driver for Linux 5.20 is also making more preparations for Ponte Vecchio enablement.
Intel's Xe HPC Ponte Vecchio is what is powering Argonne's Aurora supercomputer and aiming to compete with the likes of the NVIDIA H100 and AMD MI250X. Ponte Vecchio is said to have as much as 100 billion transistors and should be quite a compute beast. On the software side, Intel engineers have been busy maturing the oneAPI / Level Zero support for Ponte Vecchio and the kernel driver developers ensuring the Linux driver support upstream is getting into shape ahead of Ponte Vecchio getting more exposure later this calendar year.
With this week's drm-intel-gt-next pull there is "a lot of driver refactoring" in preparation for handling this massive Intel Xe HPC GPU and a lot of early enablement code for Ponte Vecchio. It doesn't look like Linux 5.20 will be ready for Ponte Vecchio but this is simply the starting point and expect the "PVC" support to be worked out over the next few kernel cycles, similar to the lengthy bring-up for DG2/Alchemist.
Aside from the significant driver work around lighting up Ponte Vecchio, other driver changes in this pull include enabling huge pages for Icelake graphics and newer regardless of IOMMU state, resuming from suspend should be around 100ms faster for modern platforms, and there are many driver fixes throughout.
Among the fixes are ensuring Arc Graphics "Alchemist" cards don't crash in small BAR configurations while the actual small BAR enablement work is still ongoing, the GuC back-end has fixed EU scheduling priority for DG2, DG2 HuC loading support, and various workarounds.
More details on this pull for DRM-Next to in turn go into Linux 5.20's merge window in about one month time can be found via this mailing list post.
Intel's Xe HPC Ponte Vecchio is what is powering Argonne's Aurora supercomputer and aiming to compete with the likes of the NVIDIA H100 and AMD MI250X. Ponte Vecchio is said to have as much as 100 billion transistors and should be quite a compute beast. On the software side, Intel engineers have been busy maturing the oneAPI / Level Zero support for Ponte Vecchio and the kernel driver developers ensuring the Linux driver support upstream is getting into shape ahead of Ponte Vecchio getting more exposure later this calendar year.
Intel rendering of Ponte Vecchio.
With this week's drm-intel-gt-next pull there is "a lot of driver refactoring" in preparation for handling this massive Intel Xe HPC GPU and a lot of early enablement code for Ponte Vecchio. It doesn't look like Linux 5.20 will be ready for Ponte Vecchio but this is simply the starting point and expect the "PVC" support to be worked out over the next few kernel cycles, similar to the lengthy bring-up for DG2/Alchemist.
Aside from the significant driver work around lighting up Ponte Vecchio, other driver changes in this pull include enabling huge pages for Icelake graphics and newer regardless of IOMMU state, resuming from suspend should be around 100ms faster for modern platforms, and there are many driver fixes throughout.
Among the fixes are ensuring Arc Graphics "Alchemist" cards don't crash in small BAR configurations while the actual small BAR enablement work is still ongoing, the GuC back-end has fixed EU scheduling priority for DG2, DG2 HuC loading support, and various workarounds.
More details on this pull for DRM-Next to in turn go into Linux 5.20's merge window in about one month time can be found via this mailing list post.
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