The Libre RISC-V Vulkan Accelerator Will Be Targeting 25 FPS @ 720p, 5~6 GFLOPs

For those interested in the proposed quad-core RISC-V Libre SoC that is intended to go in-step with the Rust-written Kazan for offering Vulkan support, the initial performance target has now been shared.

While keeping in mind the Libre RISC-V effort is still very young into its endeavor, the performance target they are hoping for is 1280 x 720 25 fps, 100 Mpixels/sec, 30 Mtriangles/sec, 5-6 GFLOPs, according to their new Libre RISC-V M-Class page. Of course, that's very low by today's standards for GPUs and even for licensable graphics core IP available to embedded/mobile vendors, especially with the Libre RISC-V if everything pans out probably not premiering until 2020 at the earliest. But while the performance may be severely limited compared to what's currently available, their differentiation again is on being a "100% libre" design built atop the royalty-free RISC-V processor ISA.

The Libre RISC-V M-Class is a RISC-V chip that is libre-licensed to the bedrock. It is a low-power, mobile-class, 64-bit Quad-Core SoC at a minimum 800mhz clock rate, suitable for tablet, netbook, and industrial embedded systems. Full source code and files are available not only for the operating system and bootloader, but also for the processor, its peripherals and its 3D GPU and VPU.

We'll see how much interest there is in such an offering, especially with a likely crowd-funding campaign coming up.

On the plus side, they are supporting Kazan development and I am a big proponent of that for having a vendor-neutral, open-source Vulkan implementation that can run on top of the CPU using LLVM and Rust (formerly was known as Vulkan-CPU during GSoC 2017)... Basically what LLVMpipe is to OpenGL, Kazan is aiming to fill that void for Vulkan. So if they can get Kazan running at ~25 FPS @ 720p on a 800MHz+ quad-core RISC-V SoC, running it on a modern x86_64/POWER/ARM CPU should yield a fair amount of potential for developers trying to debug Vulkan/SPIR-V code in a vendor-neutral code path or for running as a software fallback.

Libre RISC-V lead designer Luke Kenneth Casson Leighton has also put out a blog post with more details and as a follow-up to my recent articles on this effort.

Separately, Luke has also shared an update on his EOMA68 effort and now has the 1,000 PCBs in hand for assembly.