Intel's LLVM-Based SYCL Compiler Continues Taking Shape

Written by Michael Larabel in Intel on 26 July 2019 at 06:32 AM EDT. 1 Comment
While a bit quiet over the summer months and their Data Parallel C++ announcement was recently made, Intel's LLVM-based SYCL compiler continues maturing and picking up new features as the beta roll-out of oneAPI is expected in Q4.

Intel's code pushes to their currently-forked LLVM repository this month has yielded new attributes being worked on for the Intel FPGA device support, a new plug-in interface to help with porting SYCL to non-OpenCL APIs, new address space handling rules, a basic version of a hierarchical parallelism API, new built-in functions, the removal of their old scheduler, and other enhancements.

Those wanting to see all the latest happenings to Intel's open-source SYCL work this summer can find the detailed change-log via intel/llvm on GitHub.

Intel is still planning to upstream their SYCL support into LLVM, but obviously it's not at a stage to do so. The soonest that could happen now would be LLVM 10.0 considering LLVM 9.0 was recently branched, but it remains to be seen if that will be too soon for the SYCL back-end to stabilize and could potentially be diverted to LLVM 11.0. Anyhow, the rest of the year will certainly be interesting to watch it play out with this SYCL support, oneAPI and Data Parallel C++, and Intel's other open-source software activities.
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