GNU Binutils 2.41 Coming With Intel AMX-COMPLEX + FRED/LKGS, New RISC-V & LoongArch Bits

GNU Binutils 2.41 was branched today in its Git repository in preparations for releasing this collection of binary utilities widely relied upon by Linux and other platforms.

GNU Binutils 2.41 is bringing support for many new processor ISA extensions and other improvements to these utilities that are critical to the open-source ecosystem. Some of the highlights for Binutils 2.41 changes include:

- Intel LKGS and FRED instruction support within Binutils.

- Intel AMX-COMPLEX support that will premiere with Intel Xeon Scalable "Granite Rapids" processors.

- Binutils on MIPS now supports the Sony Allegrex processor used by the PlayStation Portable. This Sony MIPS CPU uses the MIPS II ISA with a single-precision FPU.

- SFrame Version 2 is the default format version supported by Gas, LD, readelf, and objdump utilities.

- The "--strip-section-headers" option is added to the objcopy and strip utilities for removing ELF section headers from ELF files.

- GNU Binutils 2.41 for RISC-V supports many new extensions around conditional zero instructions, new floating-point instructions, and the vector crypto instructions. This includes Zicond, Zfs, Zvbb, Zvbc, Zvkg, Zvkned, Zvknh[ab], Zvksed, Zvksh, Zvkn, Zvknc, Zvkng, Zvks, Zvksc, Zvkg, and Zvkt. There is also the XVentanaCondOps vendor-defined extension.

- GNU Binutils also adds the new LoongArch SIMD extensions. This includes the 128-bit vectors with Loongson SIMD eXtension (LSX) and Loongson Advanced SIMD eXtension for 256-bit vectors (LASX). The Loongson Virtualization extension (LVZ) is supported too along with the Loongson Binary Translation (LBT) extension. On the kernel side, Linux 6.5 adds support for the new LoongArch vector/SIMD extensions.

Those wishing to help in testing GNU Binutils 2.41 over the next few weeks can find the code via the binutils-2_41-branch in Git.