AMD's "Sabrina" SoC Is Mendocino - Coreboot Enablement Continues

You may recall the Phoronix news earlier this year around an AMD "Sabrina" SoC appearing in Coreboot for open-source system firmware support. Over the past few months we've cited a number of AMD Sabrina hits in open-source code but outside of that haven't heard much else about "Sabrina" or seen it on AMD's roadmaps.

Similar to how in the past the AMD Radeon folks have used colorful fishy codenames for early open-source enablement patches for next-generation graphics hardware rather than the actual product codename, this too is the case with Sabrina. The latest patches over the weekend to Coreboot confirm that AMD Sabrina is an alternative codename for Mendocino.

Earlier this year AMD Sabrina references began appearing in open-source code. Sabrina hasn't been mentioned elsewhere but could have been a custom/semi-custom part. But now we know it's just an alias for the since-announced Mendocino.

Back at Computex, AMD announced Mendocino as budget laptop SoCs launching in Q4. AMD Mendocino will target $399~699 USD mainstream laptops and featuring 6nm TSMC Zen 2 cores with 4 cores / 8 threads, RDNA2 graphics, and LPDDR5 memory. Nice on the graphics side as well as exclusively using LPDDR5 system memory, but lagging behind on the CPU side with Zen 2 - understandable though given the low-end/low-cost space and ultra-portables like Chromebooks usually not engaging in too compute intensive work.

Coreboot's latest changes merged in Git today confirm that Sabrina is actually an alias for Mendocino. The latest Coreboot Git has changes for Sabrina/Mendocino and continuing to focus on upcoming Google Chromebooks making use of this Zen 2 + RDNA2 SoC. It's great seeing all of this Sabrina/Mendocino open-source work going back to early in the year so hopefully come Q4 there will be some interesting budget Chromebooks with AMD Mendocino.