AMD Updates Linux Patches For Lowering Idle Exit Latency
Last month an AMD engineer began posting Linux kernel patches so the kernel prefers the MWAIT instruction over HALT for lowering the CPU idle exit latency. Preferring MWAIT over HALT has been something Intel CPUs on Linux have preferred going back to the Core 2 days and indeed with modern AMD CPUs there is significant advantages to lowering the exit latency in doing so for the idle code. This morning the latest iteration of the work was posted.
An updated version of the Linux patch series so AMD CPUs prefer the MWAIT usage over HALT (HLT instruction) was sent out today by AMD's Wyes Karny. The MWAIT instruction is more efficient than HLT and this code change will make use of that on systems lacking CPU idle driver support -- such as when global C-states are disabled by the system BIOS or kernel builds without CPU idle enabled. This optimization is done with AMD's high performance computing (HPC) customers in mind where they often disable global C-states intentionally.
AMD has not relied on MWAIT in this configuration since families prior to Family 10h / K10 have not supported the instruction while K10 to Bulldozer CPUs have supported MWAIT but not the MWAIT C1. It's basically with Zen 1 and newer where using MWAIT is clearly the better choice over HALT. The Monitor Wait "MWAIT" instruction hints for the processor to stop instruction execution and can enter an optimized state. The Linux kernel makes use of MWAIT/HLT as part of its idle loop.
With AMD's own numbers on Zen 3, they have found with this patch series going from HLT to MWAIT improves the exit latency by 21.74% for one test or in another test of context switching performance the wake-up latency reduction netted a 45% improvement. AMD has confirmed similarly benefits with older Zen CPUs too.
See this patch series if interested in more details. Hopefully this work will manage to get buttoned up in time for the v5.19 kernel cycle.
An updated version of the Linux patch series so AMD CPUs prefer the MWAIT usage over HALT (HLT instruction) was sent out today by AMD's Wyes Karny. The MWAIT instruction is more efficient than HLT and this code change will make use of that on systems lacking CPU idle driver support -- such as when global C-states are disabled by the system BIOS or kernel builds without CPU idle enabled. This optimization is done with AMD's high performance computing (HPC) customers in mind where they often disable global C-states intentionally.
AMD has not relied on MWAIT in this configuration since families prior to Family 10h / K10 have not supported the instruction while K10 to Bulldozer CPUs have supported MWAIT but not the MWAIT C1. It's basically with Zen 1 and newer where using MWAIT is clearly the better choice over HALT. The Monitor Wait "MWAIT" instruction hints for the processor to stop instruction execution and can enter an optimized state. The Linux kernel makes use of MWAIT/HLT as part of its idle loop.
With AMD's own numbers on Zen 3, they have found with this patch series going from HLT to MWAIT improves the exit latency by 21.74% for one test or in another test of context switching performance the wake-up latency reduction netted a 45% improvement. AMD has confirmed similarly benefits with older Zen CPUs too.
See this patch series if interested in more details. Hopefully this work will manage to get buttoned up in time for the v5.19 kernel cycle.
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