AMD Sends Out Patches Adding "Znver3" Support To GNU Binutils With New Instructions
Written by Michael Larabel in AMD on 19 October 2020 at 12:04 AM EDT. 20 Comments
AMD --
One of AMD's compiler experts this week sent out a patch wiring up Zen 3 support in the important GNU Binutils collection for Linux systems.

The patch adds Znver3 to Binutils and was sent out at the start of the week. Unfortunately though the GNU Compiler Collection (GCC) patches for Znver3 have yet to be posted by AMD but hopefully will be done with enough time still for reaching the early next year GCC 11 compiler release.

In any case the public Binutils patch for Znver3 confirms that the forthcoming AMD Zen 3 processors support a number of new instructions.

First up are instructions new to Zen 3 not found currently with Intel CPUs:

INVLPGB - An instruction for invalidating TLB entries with broadcast.

TLBSYNC - This is used as a synchronizing instruction for TLB invalidations.

SNP - The SNP instruction set is comprised of the PSMASH, PVALIDATE, RMPUPDATE, and RMPADJUST instructions. PSMASH expands a 2MB RMP entry into a corresponding set of 4KB page RMP entries. PVALIDATE is used for validating or rescinding validation of a guest page's RMP entry, RMPUPDATE writes a new RMP entry, and RMPADJUST modifies RMP permissions for a guest page.

The instructions aren't particularly exciting to most end-users but notable in that Intel currently doesn't expose these instructions where as in past Zen generations it was mostly an AMD catch up game for employing instructions already supported by Intel CPUs.

Seeing INVLPGB / TLBSYNC / SNP support though isn't too surprising as AMD's Programming Reference Manual has noted these instructions since April. But now with the Binutils patch is the first official confirmation that these instructions are supported by AMD Zen 3 processors.

But besides those original instructions, the Znver3 target also supports some additional instructions too that have been supported by Intel CPUs:

VAES - Vector AES instructions!

VPCLMULQDQ - This instruction is to perform a carry-less multiplication of two quadwords. VPCLMULQDQ allows VEX-encoded 256-bit version but part of the path to the AVX-512 extensions supported by Intel.

INVPCID - PCID support with Zen 3. Though we previously reported on AMD indicating work on PCID support and AMD Linux patches for using PCID/INVPCID with KVM guests.

OSPKE - PKE support albeit isn't too surprising and reported on back in April for memory protection keys with AMD CPUs.

That's it so far in terms of the Zen 3 patches for the GNU (or LLVM) open-source toolchain plumbing around Zen 3 (znver3) but as more lands we'll certainly let you know on Phoronix.
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