RADV's Iffy 16-bit Integer Support Merged Into Mesa
Written by Michael Larabel in Mesa on 18 September 2018 at 04:38 AM EDT. 4 Comments
MESA --
Just days after the patches were published for enabling 16-bit integers within shaders for the RADV driver, this Radeon Vulkan driver code has been merged.

The code came out last week by Valve developer Samuel Pitoiset for enabling shaderInt16, the capability allowing 16-bit signed/unsigned integers within the shader code.

Besides crossing off another Vulkan capability off the TODO list, it's worth noting that this was one of the few remaining Vulkan physical device features not supported until now. The only other unimplemented ones are ASTC LDR and storage image multi-sample.

The code has been merged for Mesa 18.3, but Samuel still doesn't sound too confident in its full implementation. "Not sure if this is all wired up. CTS does pass and the Tangrams demo works fine on Vega. There are corruption issues on Polaris but not sure if that related to 16-bit support." Hopefully any issues will be ironed out ahead of the Mesa 18.3 release around the end of November.
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