RISC-V CPU Idle Support, Other RISC-V Improvements Merged Into Linux 5.18

Last week the main RISC-V pull for Linux 5.18 brought Sv57 five level page table support, improved PolarFire SoC support, an optimized MEMMOVE code, support for Restartable Sequences, and more. A second batch of RISC-V feature updates were sent out this week and now merged for making Linux 5.18 even better for this open processor ISA.

The big set of RISC-V feature changes were merged last week as noted, but enough additional (and tested) material was ready to go in now as part of a second part of the CPU architecture updates.

First up there is RISC-V CPU Idle support using the newer SBI (Supervisor Binary Interface) extension. The RISC-V CPU Idle driver is "inspired" by the design of Arm's PSCI CPU Idle driver. Western Digital contributed heavily to the development of this new driver for dealing with the idle states of the processor cores for improving energy savings.

RISC-V also now supports the CURRENT_STACK_POINTER kernel option for extra stack debugging around the hardened user-copy code. Additionally, RISC-V's default configuration files now opt for "CONFIG_PROFILING" enabled by default. This is for making use of the viable RISC-V PMU drivers on different platforms for help with performance profiling and other kernel profiling features.

The rest of the work is mostly clean-ups/fixes. See this pull request for more details on these latest RISC-V changes for Linux 5.18 -- certainly most interesting is the CPU Idle work landing.