Libre RISC-V Accelerator Secures 300k EUR In Grants, Still Undecided About The ISA
![RISC-V](/assets/categories/risc-v.webp)
Last year they already secured a 50k EUR grant for working on this low-end chip that initially was envisioned to be an open-source RISC-V SoC. Though more recently Libre RISC-V is seriously looking at using an OpenPOWER architecture design rather than RISC-V.
While the ISA remains in flux, the project now announced they secured additional grants now amounting to 300k EUR in funding.
Their NLNet grants are detailed here. The grants are to work on pieces like video acceleration, creating standards for 3D/video, and other work items.
While they haven't yet decided between RISC-V vs. OpenPOWER, it looks like they could decide that soon. In January is the expected release of the OpenPOWER EULA and so after that they can seriously evaluate OpenPOWER to see if it's a better option than RISC-V.
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