Intel Sierra Forest EDAC Support Coming With Linux 6.4
As part of Intel's ongoing Linux support preparations for next year's Sierra Forest processors that will feature up to 144 Xeon E cores per socket, the Error Detection And Correction (EDAC) driver support is set to be added for the upcoming Linux 6.4 kernel cycle.
Queued now in RAS.git's edac-for-next branch is Intel Sierra Forest server support being added to the "i10nm" EDAC driver that has been in use since Xeon Ice Lake servers.
The Sierra Forest addition to the Intel EDAC driver is a simple one-liner to simply add in the new CPU ID for these all-E-core processors. What makes this patch more noteworthy is it does confirm that Intel Sierra Forest has a memory controller similar to that of Granite Rapids. To this point I hadn't seen it confirmed by Intel whether Sierra Forest's memory controller would be based on that of Granite Rapids or of Sapphire/Emerald Rapids. After all, Sierra Forest is expected to launch before Granite Rapids in the first half of 2024.
With the EDAC driver code path, Sierra Forest CPUs use the same code paths as Granite Rapids "GNR", which was added in the Linux 6.3 kernel. With that prior Granite Rapids EDAC enablement, it confirmed 12 channels of DDR5 memory. So now in turn for Sierra Forest looks like confirmation of the 12 channel DDR5 memory support rather than 8 channels found with Sapphire Rapids and Emerald Rapids. This goes along with recent rumors/leaks pointing at 12 channel DDR5 / 24 DIMM support for Sierra Forest, but at least now more reputable in the form of a Linux kernel driver patch.
Intel's open-source engineers have been working to get the Sierra Forest Linux support all squared away ahead of the product launch in H1'2024. Sierra Forest will be competing with AMD's EPYC Bergamo processors launching this year with up to 128 cores per socket and twelve channel DDR5 memory, which first appeared with EPYC Genoa processors.
Queued now in RAS.git's edac-for-next branch is Intel Sierra Forest server support being added to the "i10nm" EDAC driver that has been in use since Xeon Ice Lake servers.
The Sierra Forest addition to the Intel EDAC driver is a simple one-liner to simply add in the new CPU ID for these all-E-core processors. What makes this patch more noteworthy is it does confirm that Intel Sierra Forest has a memory controller similar to that of Granite Rapids. To this point I hadn't seen it confirmed by Intel whether Sierra Forest's memory controller would be based on that of Granite Rapids or of Sapphire/Emerald Rapids. After all, Sierra Forest is expected to launch before Granite Rapids in the first half of 2024.
With the EDAC driver code path, Sierra Forest CPUs use the same code paths as Granite Rapids "GNR", which was added in the Linux 6.3 kernel. With that prior Granite Rapids EDAC enablement, it confirmed 12 channels of DDR5 memory. So now in turn for Sierra Forest looks like confirmation of the 12 channel DDR5 memory support rather than 8 channels found with Sapphire Rapids and Emerald Rapids. This goes along with recent rumors/leaks pointing at 12 channel DDR5 / 24 DIMM support for Sierra Forest, but at least now more reputable in the form of a Linux kernel driver patch.
Intel's open-source engineers have been working to get the Sierra Forest Linux support all squared away ahead of the product launch in H1'2024. Sierra Forest will be competing with AMD's EPYC Bergamo processors launching this year with up to 128 cores per socket and twelve channel DDR5 memory, which first appeared with EPYC Genoa processors.
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