New AMD Zen 3 Fixes Published For The GCC 11 Compiler
Last week saw several patches for working to tune the Znver3 GCC 11 support with correct latencies for more instructions and other optimizing. Today SUSE's Jan Beulich merged a number of GCC x86-64 fixes, including specifically for the Zen 3 support.
The code is about fixing Zen 3 instructions:
For INVLPGB the operand count was wrong (besides %edx there's also %ecx which is an input to the insn). In this case I see little sense in retaining the bogus 2-operand template. Plus swapping of the operands wasn't properly suppressed for Intel syntax.
For PVALIDATE, RMPADJUST, and RMPUPDATE bogus single operand templates were specified. These get retained, as the address operand is the only one really needed to expressed non-default address size, but only for compatibility reasons. Proper multi-operand insn get introduced and the testcases get adjusted / extended accordingly.
While at it also drop the redundant definition of __amd64__ - we already have x86_64 defined (or not) to distinguish 64-bit and non-64-bit cases.
We'll see how much more tuning and/or fixes for AMD Zen 3 happens ahead of the GCC 11.1 stable release in roughly one month's time.
As I've said many times before, it's too bad that this Znver3 compiler support wasn't worked out much sooner ahead of any Ryzen 5000 or EPYC 7003 series processors shipping rather than now so late in the GCC 11 cycle on its stage four leg of development. If the Zen 3 compiler support was worked out long ago, there wouldn't be this mad dash and would have allowed for the new compiler target to bake and receive plenty of early testing by enthusiastic Linux users for much broader test coverage. Intel on this front generally publishes their initial compiler support at least a year before the CPUs launch if not two or three years in many cases.