AMD Ports Register Shadowing To The Mesa RADV Vulkan Driver

AMD engineer Yogesh Mohan Marmithu ported register shadowing support from the RadeonSI Gallium3D driver over to the RADV Vulkan driver. This register shadowing support is intended to be used with the AMDGPU kernel driver Mid-Command Buffer Preemption (MCBP) support. That is enabled when making use of SR-IOV or currently when setting the amdgpu.mcbp=1 kernel module option. The register shadowing for the RADV driver currently requires setting the "RADV_DEBUG=shadowregs" environment variable.
The register shadowing for mid-command buffer preemption can be useful for GPU virtualization and other purposes where the GPU can switch to a different process at any place in the command buffers.
See this merge request if interested in more details on this RADV register shadowing support.
20 Comments