AMD Ports Register Shadowing To The Mesa RADV Vulkan Driver

Written by Michael Larabel in Radeon on 27 January 2023 at 11:00 AM EST. 20 Comments
Most of the Mesa Radeon Vulkan "RADV" driver development has been done by the likes of Valve, Google, and Red Hat engineers with it being an "unofficial" driver while AMD supports AMDVLK as their official open-source Vulkan driver as well as supporting their closed-source AMDGPU-PRO Vulkan driver too that shares common code with their Windows Vulkan driver. It was pleasant to see AMD this week though submitting new feature code to RADV.

AMD engineer Yogesh Mohan Marmithu ported register shadowing support from the RadeonSI Gallium3D driver over to the RADV Vulkan driver. This register shadowing support is intended to be used with the AMDGPU kernel driver Mid-Command Buffer Preemption (MCBP) support. That is enabled when making use of SR-IOV or currently when setting the amdgpu.mcbp=1 kernel module option. The register shadowing for the RADV driver currently requires setting the "RADV_DEBUG=shadowregs" environment variable.

The register shadowing for mid-command buffer preemption can be useful for GPU virtualization and other purposes where the GPU can switch to a different process at any place in the command buffers.

Mesa 23.1 RADV now supports register shadowing.

See this merge request if interested in more details on this RADV register shadowing support.
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