AMD Talks Up Zen 4 AVX-512, Genoa, Siena & More At Financial Analyst Day
AMD today hosted their 2022 Financial Analyst Day where they made some new disclosures and firmed up past product road-map plans.
Among the mix of technical information shared at the AMD Financial Analyst Day 2022 included:
- AMD notes 5nm and 4nm products in the Zen 4 space and 4nm and 3nm for Zen 4 processors, without noting the breakdown of SKUs or chiplets between the different processes.
- AMD confirmed AVX-512 and AI acceleration instructions for Zen 4.
- 9~10% instructions per clock (IPC) increase with Zen 4 over Zen 3.
- Up to 125% memory bandwidth per core improvement with Zen 4, thanks to DDR5.
- Zen 5 in 2024 will indeed be a new "grounds-up microarchitecture" redesign. More AI and machine learning optimizations are expected for Zen 5.
- For EPYC 7004 "Genoa", AMD is talking greater than 75% improvement for enterprise Java performance compared to EPYC 7003 series. 12 channel DDR5 confirmed for Genoa as well as PCIe Gen 5 and CXL support. Genoa is on track for Q4 launch.
- EPYC "Bergamo" with Zen 4C cores for cloud computing will be able to offer twice the cloud density as 3rd Gen EPYC. Bergamo CPUs will launch in H1'2023.
- Genoa-X was confirmed as Genoa with 3D V-Cache. Genoa-X will offer more than 1GB of 3D V-Cache per CPU/socket.
- "Siena" was announced as a lower-cost Zen 4 platform intended for edge computing and telecommunications. Will be quite interesting to see how this Siena play is for lower-cost EPYC.
Hopefully with the disclosures now like AVX-512 for Zen 4 publicly confirmed, hopefully AMD will move on to posting the GCC and LLVM/Clang Znver4 compiler target and other remaining Zen 4 enablement patches for Linux.
Among the mix of technical information shared at the AMD Financial Analyst Day 2022 included:
- AMD notes 5nm and 4nm products in the Zen 4 space and 4nm and 3nm for Zen 4 processors, without noting the breakdown of SKUs or chiplets between the different processes.
- AMD confirmed AVX-512 and AI acceleration instructions for Zen 4.
- 9~10% instructions per clock (IPC) increase with Zen 4 over Zen 3.
- Up to 125% memory bandwidth per core improvement with Zen 4, thanks to DDR5.
- Zen 5 in 2024 will indeed be a new "grounds-up microarchitecture" redesign. More AI and machine learning optimizations are expected for Zen 5.
- For EPYC 7004 "Genoa", AMD is talking greater than 75% improvement for enterprise Java performance compared to EPYC 7003 series. 12 channel DDR5 confirmed for Genoa as well as PCIe Gen 5 and CXL support. Genoa is on track for Q4 launch.
- EPYC "Bergamo" with Zen 4C cores for cloud computing will be able to offer twice the cloud density as 3rd Gen EPYC. Bergamo CPUs will launch in H1'2023.
- Genoa-X was confirmed as Genoa with 3D V-Cache. Genoa-X will offer more than 1GB of 3D V-Cache per CPU/socket.
- "Siena" was announced as a lower-cost Zen 4 platform intended for edge computing and telecommunications. Will be quite interesting to see how this Siena play is for lower-cost EPYC.
Hopefully with the disclosures now like AVX-512 for Zen 4 publicly confirmed, hopefully AMD will move on to posting the GCC and LLVM/Clang Znver4 compiler target and other remaining Zen 4 enablement patches for Linux.
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