Marvell ThunderX3 Machine Model Pending For The GCC Compiler
Last month Marvell announced the ThunderX3 server processors with up to 96 ARM cores per SoC and with 4-way SMT means up to 384 threads per socket. This 7nm Arm server processor also supports eight DDR4-3200 memory channels, 64 lanes of PCIe 4.0, and other advancements to provide more competitiveness in the Arm server space. Marvell is now working on getting the ThunderX3 software support ironed out, including for the GCC compiler.
Besides kernel bits out of Marvell, the GNU Compiler Collection support has been getting squared away for targeting the ThunderX3 cores. Out this week are the newest patches providing the machine model for the scheduler with the "thunderxt311" model.
The ThunderX3 scheduling and tuning patch imply ARMv8.4 plus the crypto and SHA3 extensions. For now at least the ThunderX3 code is reusing the existing ThunderX2 cost table.
LLVM Clang compiler support for the Marvell ThunderX3T110 is currently pending review.
Besides kernel bits out of Marvell, the GNU Compiler Collection support has been getting squared away for targeting the ThunderX3 cores. Out this week are the newest patches providing the machine model for the scheduler with the "thunderxt311" model.
The ThunderX3 scheduling and tuning patch imply ARMv8.4 plus the crypto and SHA3 extensions. For now at least the ThunderX3 code is reusing the existing ThunderX2 cost table.
LLVM Clang compiler support for the Marvell ThunderX3T110 is currently pending review.
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