RISC-V Adding Kernel-Mode FPU For Linux 6.10 To Enable Recent AMD Display Support

With the upcoming Linux 6.10 kernel cycle, the RISC-V architecture code is seeing kernel-mode FPU. This kernel floating point support is needed for the AMDGPU kernel graphics driver and particular its DCN display code. In turn this should allow recent AMD Radeon graphics cards to work on RISC-V with display support using the company's open-source driver stack.

While older AMD Radeon graphics cards have worked fine with the open-source AMDGPU driver on RISC-V, newer graphics cards relying on the Display Core Next (DCN) functionality have had issues due to its dependence on floating point support. Now for Linux 6.10, kernel-mode FPU is being enabled for RISC-V.

Queued into Andrew Morton's mm.git mm-everything branch ahead of the Linux 6.10 merge window next month is the patch enabling the kernel-mode FPU for RISC-V. The patch from SiFive notes:

"This is motivated by the amdgpu DRM driver, which needs floating-point code to support recent hardware. That code is not performance-critical, so only provide a minimal non-preemptible implementation for now.

Support is limited to riscv64 because riscv32 requires runtime (libgcc) assistance to convert between doubles and 64-bit integers."

In any event good news for those wanting to use the latest AMD Radeon graphics cards on RISC-V systems like the HiFive Unleashed (still waiting on some better RISC-V developer box to see wide availability...).