Latest Batch Of LoongArch Patches Posted For The Linux Kernel
Loongson engineers continue working on LoongArch enablement across the Linux/open-source ecosystem from the CPU target support beginning to appear in the GNU and LLVM toolchains to other low-level libraries while also working on the Linux kernel enablement.
While earlier iterations of the Linux kernel patches were criticized for copying existing MIPS code, Loongson has been working through the differences and this morning published their sixth version of the LoongArch basic support. The patch cover letter sums it up as, "LoongArch is a new RISC ISA, which is a bit like MIPS or RISC-V. LoongArch includes a reduced 32-bit version (LA32R), a standard 32-bit version (LA32S) and a 64-bit version (LA64). LoongArch use ACPI as its boot protocol LoongArch-specific interrupt controllers (similar to APIC) are already added in the next revision of ACPI Specification (current revision is 6.4)."
The v6 series re-bases the code to Linux 5.16-rc2 (still well behind the latest upstream Git, but at least better than 5.15) and has a number of fixes and improvements to the low-level architecture code.
The Loongson 3A5000 is the first LoongArch64 processor.
The LoongArch architecture bring-up for the Linux kernel currently amounts to around 23k lines of new code. See this patch series if interested in these Chinese domestic CPU architecture, but at least for now the performance isn't competitive to modern CPU alternatives,
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