Intel Granite Rapids Support Submitted For The GCC Compiler

Written by Michael Larabel in Intel on 4 November 2022 at 06:08 AM EDT. Add A Comment
INTEL --
While Xeon Scalable "Sapphire Rapids" will finally see its formal launch in January as recently revealed by Intel, it will then be succeeded down the road by Emerald Rapids. Succeeding Emerald Rapids will then be Granite Rapids to which there is now an initial GCC compiler enablement patch posted. Granite Rapids won't be out until at least well into 2024 while fortunately they have already begun their compiler enablement work to ensure that new CPU instructions and other capabilities are in place well ahead of launch.

Sent out this morning was the initial patch for adding the Intel Granite Rapids target to GCC, complete with the "-march=graniterapids" support.

This follows a lot of other GCC (and LLVM/Clang) patches posted recently by Intel engineers for Sierra Forest and Grand Ridge. In fact, overnight the Sierra Forest enablement patch previously out for review on the mailing list has now been merged along with Intel AMX-FP16 and Intel CMPccXADD support. Those goodies have landed in time for GCC 13.

The Intel Granite Rapids enablement patch is relying on AMX FP16 presence for recognizing Granite Rapids versus other earlier Intel CPU models. The "-march=graniterapids" targeting at least for now shows the prominent supported instruction set extensions as:
graniterapids
Intel graniterapids CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, CX16, SAHF, FXSR, AVX, XSAVE, PCLMUL, FSGSBASE, RDRND, F16C, AVX2, BMI, BMI2, LZCNT, FMA, MOVBE, HLE, RDSEED, ADCX, PREFETCHW, AES, CLFLUSHOPT, XSAVEC, XSAVES, SGX, AVX512F, AVX512VL, AVX512BW, AVX512DQ, AVX512CD, PKU, AVX512VBMI, AVX512IFMA, SHA, AVX512VNNI, GFNI, VAES, AVX512VBMI2, VPCLMULQDQ, AVX512BITALG, RDPID, AVX512VPOPCNTDQ, PCONFIG, WBNOINVD, CLWB, MOVDIRI, MOVDIR64B, AVX512VP2INTERSECT, ENQCMD, CLDEMOTE, PTWRITE, WAITPKG, SERIALIZE, TSXLDTRK, UINTR, AMX-BF16, AMX-TILE, AMX-INT8, AVX-VNNI, AVX512FP16, AVX512BF16, AMX-FP16 and PREFETCHI instruction set support.

It's possible there could be other new instructions yet to be revealed that could still be introduced in compiler patches latter, but at least already has the prominent ones in place like AMX-FP16.


Intel continues their trend of posting new CPU open-source compiler support much sooner than AMD.


The Granite Rapids patch is now out on the GCC mailing list. Given the timing it may still squeeze into the GCC 13 compiler that is ending feature work soon to focus on bug/regression fixing before the GCC 13.1 stable release early next year. It's good seeing Intel getting Granite Rapids, Sierra Forest, and Grand Ridge all squared away as usual in a timely manner for GCC (and LLVM Clang) so that this support will be found in released compilers well ahead of the CPUs reaching retail customers. It's a pleasant tradition held by Intel on the Linux/open-source side... Meanwhile on the AMD side, it was just in late October when initial Znver4 support was finally added to GCC 13.
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