Intel Preparing APX PPX Support For GCC: Push-Pop Acceleration
Hongyu Wang of Intel's open-source compiler team explains of the APX PPX feature:
PPX stands for Push-Pop Acceleration. PUSH/PUSH2 and its corresponding POP can be marked with a 1-bit hint to indicate that the POP reads the value written by the PUSH from the stack. The processor tracks these marked instructions internally and fast-forwards register data between matching PUSH and POP instructions, without going through memory or through the training loop of the Fast Store Forwarding Predictor (FSFP). This feature can also be adopted to PUSH2/POP2.
For GCC, we emit explicit suffix 'p' (paired) to indicate the push/pop pair are marked with PPX hint. To separate form original push/pop, we use UNSPEC to restrict the PPX related patterns. So for pushp/popp, the cfi is manually adjusted for the UNSPEC PPX insns.
In the first implementation we only emit them under prologue/epilogue when saving/restoring callee-saved registers to make sure push/pop are paired. So an extra flag was added to check if PPX insns can be emitted for those register save/restore interfaces.
The PPX hint is purely a performance hint. If the 'p' suffix is not emitted for paired push/pop, the PPX optimization will be disabled, while program sematic will not be affected at all.
This patch gets the Push-Pop Acceleration all wired up as the latest piece of the APX puzzle for the GNU Compiler Collection. As mentioned though with the GCC 14 feature development ending imminently, it's not clear Intel APX support will be completed in time for GCC 14 and thus it might not be until GCC 15 in early 2025 before all of the Advanced Performance Extensions functionality will be implemented and rolled out into a stable GCC release.