AMD openSIL Detailed For Advancing Open-Source System Firmware
Open-source fans, rejoice, the most exciting thing I have read all week or perhaps the month: "AMD is committed to open-source software and is now expanding into the various firmware domains with the re-architecture of its x86 AGESA FW stack - designed with UEFI as the host firmware that prevented scaling, to other host firmware solutions such as coreboot, oreboot, FortiBIOS, Project Mu and others. A newer, open architecture that potentially allows for reduced attack surface, and perceivably infinite scalability is now available as a Proof-of-Concept, within the open-source community for evaluation, called the AMD openSIL – Open-Source Silicon Initialization Library."
We've been eager to learn more about AMD openSIL for open-source silicon initialization with Coreboot since it appeared last month in a talk summary for the OCP Prague event. That talk isn't happening until next week but today AMD published a blog post outlining openSIL.
The post further explains of their AMD openSIL solution;
This rearchitecting of the AGESA stack is interesting and long-time Phoronix readers will recall when previously AMD used to make AGESA open-source and long-ago committed to Coreboot until abandoning that when they went through their financial difficulties a decade ago... Their open-source firmware and Coreboot since then on the client side has been largely limited to Google Chromebook needs. Hopes of seeing AMD engage more with open-source firmware were renewed a few months ago when finding AMD's Genoa reference board running OpenBMC. Since 2019 I've also heard of AMD working towards a more open nature and over the years have raised questions over Coreboot and the like. Now it seems there is enough interest in open-source firmware from hyperscalers and other large customers.
AMD has been working on openSIL with the likes of prominent Coreboot developers at 9elements Security, AMI, AWS, the 3mdeb consulting firm and Coreboot/Dasharo specialists, Google, Meta, Oxide, and others. Initially openSIL is targeting 4th Gen AMD EPYC "Genoa" CPUs. It will be interesting to see if this support is extended to previous generations of EPYC processors and whether openSIL can be adapted for use on Ryzen processors.
An AMD graphic on today's openSIL blog post does also show "Ryzen" next to "EPYC", giving hope that Ryzen client/desktop processors will be seeing openSIL support with time.
While this AMD openSIL effort is very promising, it's not yet considered production ready. The post ends with, "AMD openSIL firmware libraries and associated host firmware are released as Proof-of-Concept (PoC) code for 4th Gen AMD EPYC™ based reference platform. The PoC code is not meant for production use yet. The AMD openSIL code is provided ‘as-is’."
Releasing soon will be the AMD openSIL library for 4th Gen EPYC, the openSIL Coreboot integrator's guide, openSIL Firmware Architecture Specification, and the Coreboot integration for the AMD CRB reference platform. Besides the Coreboot support atop openSIL, an AMI Aptio OpenEdition for the AMD Genoa reference platform is also expected.
Read more via this blog post by Raj Kapoor, an AMD Fellow and their Chief Firmware Architect. Raj Kapoor's OCP Prague presentation is set for 20 April where we'll learn more about AMD openSIL.
We've been eager to learn more about AMD openSIL for open-source silicon initialization with Coreboot since it appeared last month in a talk summary for the OCP Prague event. That talk isn't happening until next week but today AMD published a blog post outlining openSIL.
The post further explains of their AMD openSIL solution;
"AMD openSIL adheres to simple goals of an agnostic set of library functions written in an industry-standard language that can be statically linked to the host firmware without having to adhere to any host firmware protocols. AMD openSIL is designed to be scalable and simple to integrate, light weight, low chirp and transparent, potentially allowing for an improved security posture.
...
AMD openSIL is a set of three statically linked libraries – xSIM (x86 Silicon Initialization Libraries), xPRF (x86 Platform Reference Library) & xUSL (x86 Utilities & Services Library), that can be statically linked to any host firmware during compile/link time. Below is a comparison firmware stack diagram that exhibits the scalability between two disparate platform host firmware solutions – UEFI & coreboot, which can be scaled to any other platform host firmwares that exist today and possibly in the future."
This rearchitecting of the AGESA stack is interesting and long-time Phoronix readers will recall when previously AMD used to make AGESA open-source and long-ago committed to Coreboot until abandoning that when they went through their financial difficulties a decade ago... Their open-source firmware and Coreboot since then on the client side has been largely limited to Google Chromebook needs. Hopes of seeing AMD engage more with open-source firmware were renewed a few months ago when finding AMD's Genoa reference board running OpenBMC. Since 2019 I've also heard of AMD working towards a more open nature and over the years have raised questions over Coreboot and the like. Now it seems there is enough interest in open-source firmware from hyperscalers and other large customers.
AMD Titanite reference 2P server for Genoa.
AMD has been working on openSIL with the likes of prominent Coreboot developers at 9elements Security, AMI, AWS, the 3mdeb consulting firm and Coreboot/Dasharo specialists, Google, Meta, Oxide, and others. Initially openSIL is targeting 4th Gen AMD EPYC "Genoa" CPUs. It will be interesting to see if this support is extended to previous generations of EPYC processors and whether openSIL can be adapted for use on Ryzen processors.
An AMD graphic on today's openSIL blog post does also show "Ryzen" next to "EPYC", giving hope that Ryzen client/desktop processors will be seeing openSIL support with time.
While this AMD openSIL effort is very promising, it's not yet considered production ready. The post ends with, "AMD openSIL firmware libraries and associated host firmware are released as Proof-of-Concept (PoC) code for 4th Gen AMD EPYC™ based reference platform. The PoC code is not meant for production use yet. The AMD openSIL code is provided ‘as-is’."
Releasing soon will be the AMD openSIL library for 4th Gen EPYC, the openSIL Coreboot integrator's guide, openSIL Firmware Architecture Specification, and the Coreboot integration for the AMD CRB reference platform. Besides the Coreboot support atop openSIL, an AMI Aptio OpenEdition for the AMD Genoa reference platform is also expected.
Read more via this blog post by Raj Kapoor, an AMD Fellow and their Chief Firmware Architect. Raj Kapoor's OCP Prague presentation is set for 20 April where we'll learn more about AMD openSIL.
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