AMD-Xilinx Publishes Open-Source "Nanotube" Compiler

Written by Michael Larabel in AMD on 28 March 2023 at 02:20 PM EDT. 2 Comments
AMD-Xilinx recently open-sourced their LLVM-based Nanotube compiler that can be used for some nifty networking purposes on FPGAs.

The AMD-Xilinx Nanotube compiler takes eBPF XDP C code and built atop the LLVM compiler stack is then able to generate a packet processing pipeline in HLS C++ that can run on Xilinx FPGAs.
"Nanotube is a collection of compiler passes, libraries, and an API to facilitate execution of EBPF XDP and similar networking code on an FPGA in a SmartNIC. The compiler takes EBPF XDP C code as input and outputs a packet processing pipeline in HLS C++. This HLS C++ code can then be synthesised using Vitis HLS and placed on an FPGA.

The compiler performs various transformations on the program; starting with a translation of EBPF calls to calls to similar Nanotube API functions. It then performs multiple stages of transforming the code structurally and to different API levels.
The Nanotube library implements packet accesses and maps in an implementation which is synthesis friendly, meaning that it will be placed in the application and will create efficient hardware in high-level synthesis."

As part of the Nanotube compiler repository there is an example codebase developed by Facebook/Meta. This example is dubbed "Katran" and serves as aa high performance layer 4 network load balancer running on Xilinx FPGAs. This example for showcasing the Nanotube compiler is eBPF GPLv2-licensed code.

AMD Nanotube

Those wishing to learn more about this recently open-sourced AMD-Xilinx Nanotube compiler can find it on GitHub.
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