Intel Posts Xe DRM Scheduler Patches For Review
As part of the process for getting Intel's new Xe DRM kernel driver upstreamed as the eventual replacement to the existing i915 driver for Gen12 graphics hardware and newer, Intel engineers on Monday posted the initial Xe DRM scheduler patches that have been separated out to get review on them, figure out what can be common/shared among drivers, and get those bits upstreamed.
The Linux kernel's DRM scheduler is what started off as the AMDGPU scheduler before being promoted into the common DRM core area and began seeing use by other Direct Rendering Manager drivers. The new Xe DRM kernel driver is making use of this scheduler now too albeit with some modifications that need to be ironed out.
Intel's Matthew Brost posted the Xe DRM scheduler patches on Monday that consist of changes around the DRM scheduler for allowing a 1:1 relationship between the scheduler and entity, a generic mapping interface for the DRM scheduler, support for using TDR for all error paths of a scheduler/entity, and then annotating DMA fences for long-running workloads.
The DRM scheduler changes are to adapt better to the Intel Xe GPU design with the scheduling of all jobs ultimately being done by the firmware with its "GuC" micro-controller.
The initial "request for comments" patches on the Intel Xe DRM scheduler changes can be found via this patch series. This ultimately is just the first step toward getting the Xe DRM driver mainlined. Hopefully we'll see that new kernel driver mainlined later this year if at least in an experimental/testing form to help facilitate user testing until being able to ensure a stable transition for Gen12+ integrated and discrete graphics from the i915 driver.
The Linux kernel's DRM scheduler is what started off as the AMDGPU scheduler before being promoted into the common DRM core area and began seeing use by other Direct Rendering Manager drivers. The new Xe DRM kernel driver is making use of this scheduler now too albeit with some modifications that need to be ironed out.
Intel's Matthew Brost posted the Xe DRM scheduler patches on Monday that consist of changes around the DRM scheduler for allowing a 1:1 relationship between the scheduler and entity, a generic mapping interface for the DRM scheduler, support for using TDR for all error paths of a scheduler/entity, and then annotating DMA fences for long-running workloads.
The DRM scheduler changes are to adapt better to the Intel Xe GPU design with the scheduling of all jobs ultimately being done by the firmware with its "GuC" micro-controller.
The initial "request for comments" patches on the Intel Xe DRM scheduler changes can be found via this patch series. This ultimately is just the first step toward getting the Xe DRM driver mainlined. Hopefully we'll see that new kernel driver mainlined later this year if at least in an experimental/testing form to help facilitate user testing until being able to ensure a stable transition for Gen12+ integrated and discrete graphics from the i915 driver.
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