Intel Preparing Linear Address Masking Support (LAM)

Written by Michael Larabel in Intel on 24 December 2020 at 07:17 AM EST. 9 Comments
A few days ago there was a glibc commit mentioning Intel "LAM" and now the updated Intel documentation sheds more light on this forthcoming processor feature.

Intel updated their programming reference manual this week with new features coming to future Intel CPUs. This includes outlining Intel LAM to shed more light on it. The December 2020 update also includes updates to the Enhanced Hardware Feedback Interface as well as a chapter on new error codes for Sapphire Rapids processors. The Enhanced Hardware Feedback Interface functionality was talked about a few months ago.

Intel Linear Address Masking (LAM) is about allowing software to make use of untranslated address bits of 64-bit linear addresses for metadata. Linear addresses use either 48-bits (4-level paging) or 57-bits (5-level paging) while LAM allows the remaining space of the 64-bit linear addresses to be used for metadata.
Software usages that associate metadata with a pointer might benefit from being able to place metadata in the upper (untranslated) bits of the pointer itself. However, the canonicality enforcement mentioned earlier implies that software would have to mask the metadata bits in a pointer (making it canonical) before using it as a linear address to access memory. LAM allows software to use pointers with metadata without having to mask the meta-data bits. With LAM enabled, the processor masks the metadata bits in a pointer before using it as a linear address to access memory.

LAM is supported only in 64-bit mode and applies only addresses used for data accesses. LAM doe not apply to addresses used for instruction fetches or to those that specify the targets of jump and call instructions.

Those wanting all of the technical details on Intel LAM can see the updated PRM.

It's possible LAM is one of the new features with Sapphire Rapids given the other ongoing updates in the PRM and not yet seeing much in the way of Granite Rapids additions within the documentation or Linux code for that matter, but we'll see with time for sure when LAM is coming to Intel CPUs (the initial glibc check is just relying upon the CPU feature bit). As mentioned, the Linux/open-source enablement around Linear Address Masking has also begun and should be seeing more work soon now that LAM is public. Kudos as usual to Intel with their timely Linux/open-source hardware enablement work well ahead of actual product launches.
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