Intel Announces Rialto Bridge As Ponte Vecchio Successor, Talks Up Falcon Shores & DAOS

Intel is using ISC 2022 this week in Hamburg, Germany to provide an update on their Super Compute Group road-map and the efforts they are pursuing both in hardware and software for a sustainable, open HPC ecosystem.

The embargo just lifted on Intel's ISC 2022 announcements that include:

Intel has formally announced Rialto Bridge as the successor to Ponte Vecchio for their next-gen data center GPU. Rialto Bridge will deliver up to 160 Xe Cores, an evolution of the Ponte Vecchio architecture with enhanced tiles, and use newer process node technology. Intel is aiming to begin sampling Rialto Bridge in mid-2023.

Intel also is talking up Falcon Shores for their XPU that combines x86 CPU cores and Xe GPU graphics cores into a single project. Falcon Shores is still targeted for 2024 with a reported 5x performance per Watt, 5x compute density, and 5x memory capacity and bandwidth improvements.

Besides talking up their future hardware, Intel also is using ISC 2022 to continue talking up their open-source software efforts around their oneAPI initiative and related open-source tooling for an open HPC ecosystem.

One of Intel's newer open-source projects they are talking up at ISC 2022 is DAOS as their new distributed parallel file-system. Intel DAOS is designed to deliver maximum performance, integrate with existing storage systems, and be more efficient than other existing parallel file-systems.

Intel has been developing DAOS for several years and has been mentioned before albeit not so prominently. DAOS is short for the Distributed Application Object Storage and intended for HPC/supercomputer use. DAOS was originally worked on as part of their Optane play. More details on the current DAOS 2.0 implementation via daos.io.

It's great seeing Intel continue so openly promoting open-source software as a selling point and making it a big part of their modern HPC play. Intel also continues to be all-in on open standards including SYCL as part of their heterogeneous compute portfolio.