LLVM Clang RISC-V Now Supports LTO
With the recent release of LLVM 9.0 the RISC-V back-end was promoted from an experimental CPU back-end to being made "official" for this royalty-free CPU ISA. Work though isn't over on the LLVM RISC-V support with new features continuing to land, like link-time optimizations (LTO) most recently being enabled within the Clang 10 code.
Within the latest Clang code this week, LTO (link-time optimizations) are now enabled for Clang targeting RISC-V. LTO, of course, is important for performance with being able to exploit more performance optimizations by the compiler at link-time.
While we aren't able to test for lack of RISC-V hardware available, LTO optimizations generally can provide meaningful improvements for large code-bases. This improvement and other RISC-V work will be part of the LLVM/Clang 10.0 release due out in early 2020.
Within the latest Clang code this week, LTO (link-time optimizations) are now enabled for Clang targeting RISC-V. LTO, of course, is important for performance with being able to exploit more performance optimizations by the compiler at link-time.
While we aren't able to test for lack of RISC-V hardware available, LTO optimizations generally can provide meaningful improvements for large code-bases. This improvement and other RISC-V work will be part of the LLVM/Clang 10.0 release due out in early 2020.
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