Kalray Posts Initial Patches For Bringing Up Linux On Their KV3-1 "Coolidge" DPU SoC
Kalray engineers today posted their initial "request for comments" patch series for enabling this new CPU architecture in the kernel. Initially the KVX port is focused on their Coolidge/MPPA3-80 SoC. Kalray's MPPA3-80 is part of what they call a Massively Parallel Processor Array architecture and is intended as a Data Processing Unit (DPU) designed for data analysis and a variety of other "intelligent systems" needs.
The Kalray MPPA3-80 is the initial focus of this Linux "KVX" kernel port.
Among the advertised use-cases for the Kalray DPU are for AI analytics, line-rate encryption/decryption/hasking, smart load balancing, RAID6 erasure coding, Computer Vision (CV) acceleration, and endless other high performance data processing needs.
Kalray K200 add-in accelerator card with MPPA3-80.
Kalray already advertises RTOS and Linux support among their operating systems supported with Coolidge while recently the company has been working toward upstreaming their "KVX" CPU port into the Linux kernel. This though is still in the early stages with the GNU Binutils support not yet upstreamed, currently there is no KVX port for the GCC or LLVM/Clang compilers but relying upon Kalray's own compiler toolchain branch for now, and today's kernel patch series is strictly marked as RFC.
In today's kernel patch series they sum up the architecture as:
The Kalray VLIW processor family (kvx) has the following features:
* 32/64 bits execution mode
* 6-issue VLIW architecture
* 64 x 64bits general purpose registers
* SIMD instructions
* deep learning co-processor
Kalray kv3-1 core which is the third of the kvx family is embedded in Kalray Coolidge SoC currently used on K200 and K200-LP boards.
The Coolidge SoC contains 5 clusters each of which is made of:
* 4MiB of on-chip memory (SMEM)
* 1 dedicated safety/security core (kv3-1 core).
* 16 PEs (Processing Elements) (kv3-1 cores).
* 16 Co-processors (one per PE)
* 2 Crypto accelerators
The Coolidge SoC contains the following features:
* 5 Clusters
* 2 100G Ethernet controllers
* 8 PCIe GEN4 controllers (Root Complex and Endpoint capable)
* 2 USB 2.0 controllers
* 1 Octal SPI-NOR flash controller
* 1 eMMC controller
* 3 Quad SPI controllers
* 6 UART
* 5 I2C controllers (3 of which are SMBus capable)
* 4 CAN controllers
* 1 OTP memory
Those wishing to learn more about Kalray's MPPA DPU Manycore architecture in general can do so via KalrayInc.com.
Kalray MPPA DPU architecture diagram.
It's great seeing Kalray working on upstreaming their "KVX" CPU port of the Linux kernel and hopefully it will all pan out in 2023 from the toolchain side up through the actual kernel enablement. At the moment the kernel-side bring-up amounts to just under 26k lines of new code. In addition to today's RFC kernel patch series, via the Kalray on GitHub is the build scripts for setting up an LLVM toolchain as well as uClibc, Musl, GDB, GNU Binutils ports for their architecture. There is also a build root for setting up an embedded Linux environment for the DPU.