DDR5 Memory Channel Scaling Performance With AMD EPYC 9004 Series

Written by Michael Larabel in Memory on 6 January 2023 at 07:30 AM EST. Page 1 of 6. 15 Comments.

In addition to the big performance uplift from AVX-512, up to 96 cores per socket, and other Zen 4 architectural improvements, also empowering the EPYC 9004 "Genoa" processors is the support for up to 12 channels of DDR5-4800 memory. In this article is a wide assortment of benchmarks looking at the AMD EPYC 9654 performance across varying numbers of populated DDR5 memory channels.

AMD 4th Gen EPYC processors support twelve DDR5 memory channels at DDR5-4800 speeds and can handle up to 6TB of addressable memory per socket. This is a big upgrade over prior generations of EPYC processors with eight channels of DDR4-3200 memory and what is found with current Xeon Scalable "Ice Lake" processors. But the cost of populating all 12 memory channels -- especially with initial DDR5 server memory pricing -- may be too much to handle at once for some deployments and tougher to justify within organizations during these turbulent economic times. Thus I set out to run some benchmarks over the holidays looking at the EPYC Genoa performance from 6 up through 12 memory channels with these Zen 4 server processors.

For memory intensive workloads the scaling up through 12 channels was there and the EPYC 9654 processors proved they could effectively make use of all twelve memory channels per socket. Obviously though not all workloads are very memory intensive, so these benchmarks are intended both as a mix of benchmarks showing how the EPYC 9654 2P performance responded under a mix of workloads whether you are trying to gauge if it's worthwhile initially going for 12 (or 24) DIMMs or simply need some independent numbers to help justify the expenditure to your boss/management.

For those that haven't looked at DDR5 server memory pricing, as of writing the cheapest DIMMs I have seen are the Samsung DDR5-4800 16GB memory modules at around $100 USD or $183 USD for the 32GB version. The 64GB DDR5-4800 server memory modules are retailing for around $350... So going for 12 DIMMs or even 24 DIMMs for a two socket AMD 4th Gen EPYC server can quickly add up.

With the AMD Titanite reference server and dual EPYC 9654 64-core processors, I completed various (mostly real-world focused) benchmarks at 6, 8, 10, and 12 memory channels. All of the memory was 64 GB DDR5-4800MT/s Samsung M321R8GA0BB0-CQKEG memory modules, kindly supplied by AMD as part of the EPYC Genoa review kit. EPYC Genoa can handle down to one memmory channel configurations while for this testing the focus was on 6 memory channels and above -- simply for not being too memory constrained, reducing the testing burden with having a lot of different tests being limited by this lone EPYC Genoa server at the moment, and the low likelihood of users procuring a higher-tier EPYC 9004 series processor and running in such a RAM limited scenario.

This memory channel scaling performance testing for AMD EPYC Genoa was carried out while the Titanite server was running Ubuntu 22.10 but upgrading to the Linux 6.1 kernel as part of my usual very bleeding-edge software look at performance.

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