Intel Pushes More GCC Patches For New Instructions On Icelake Processors
Written by Michael Larabel in Intel on 24 October 2017 at 08:15 AM EDT. 1 Comment
INTEL --
Intel has published more patches for supporting new instruction set extensions that will debut with "Ice Lake" processors when launched in late 2018 or early 2019.

Besides Intel recently landing CET support in GCC as the Control-flow Enforcement Technology, their compiler engineers have been working on supporting the other instruction set extensions coming with Icelake processors, which is the successor to the next-gen Cannonlake CPUs.

The latest Intel GCC patches include support for AVX-512 VNNI (Virtual Neural Network Instruction) and as part of that the VPDPBUSD, VPDPBUSDS, and VPDPWSSD instructions. As implied by the name, VNNI should help with neural network / deep learning workloads.

There's also now GCC compiler patches for VBMI2 (AVX-512 Vector Bit Manipulation Instructions 2) as another new AVX-512 level with the new VPCOMPRESSB, VPEXPANDB, VPSHLD, VPSHRD, and VPSHRDV instructions.

These new instructions are documented in more detail via Intel's documentation.
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