Intel Rolls Out 10nm Pentium/Celeron CPUs, Previews Rocket Lake

[coder]

No ECC memory support I presume.

No, but they actually sell Atom-branded CPUs which pair up to 16 small cores with ECC memory support and more PCIe lanes. Of course, they're in a different price range, but it's not like there is no option provided whatsoever.

https://ark.intel.com/content/www/us/en/ark.html#@PanelLabel29035

[coder]

Those celeron and pentium chips don't use Xe graphics

From what I read, they haven't specified which generation of uArch, but the J6005 has 32 EUs, which means at least Gen11 and a lot more horsepower than the previous generation.

https://ark.intel.com/content/www/us/en/ark/products/212327/intel-pentium-silver-n6005-processor-1-5m-cache-up-to-3-30-ghz.html

[coder]

They don't have AVX? Ouch. Didn't some big distro drew the line of support on AVX capable CPUs recently? If that is the case, those brand new CPUs wouldn't be supported.

Not exactly. RHEL 9* is drawing the line at "near-Nehalem", which is the ISA level before AVX and a bar which these definitely clear.

See: https://www.phoronix.com/scan.php?pa...86-64-v2-Plans

* Thanks to Space Heater for the correction.

[chithanh]

To be fair, AMD's side isn't much prettier. ECC support was left to motherboard manufacturers and most don't do it. I heard that only Ryzen-pro models really support ECC on enterprise-class PCs.

In the early days of AM4, the support for ECC was a bit inconsistent and spotty, sometimes BIOS updates would break ECC. However nowadays (since X570/B550) all big mobo vendors except MSI support ECC on AM4.

When it comes to ECC support, Pro/non-Pro makes a difference only for APUs.

[coder]

To be fair, AMD's side isn't much prettier. ECC support was left to motherboard manufacturers and most don't do it. I heard that only Ryzen-pro models really support ECC on enterprise-class PCs.

The AMD picture is even worse than that. Their mass-market APUs have ECC completely disabled, regardless of what motherboard you plug them in.

The ECC situation at the low end isn't pretty. You basically have to get a special SKU specified for industrial or embedded use. As I mentioned above, Intel sells their small-core based Industrial CPUs under the Atom brand. AMD sells embedded-oriented APUs with ECC support, as well, but they're BGA (i.e. not socketed). AFAIK, none of Intel's small-core CPUs are socketed, either.

[coder]

However nowadays (since X570/B550) all big mobo vendors except MSI support ECC on AM4.

You mean they all offer motherboards that support it? Definitely not all big-name X570 boards support it, though. It's still a minority of models, mostly those aimed at workstation or server use.

[vladpetric]

No, but they actually sell Atom-branded CPUs which pair up to 16 small cores with ECC memory support and more PCIe lanes. Of course, they're in a different price range, but it's not like there is no option provided whatsoever.

https://ark.intel.com/content/www/us...anelLabel29035

Yeap, unfortunately they are indeed small cores - the single threaded performance of those is pretty poor compared to even a Pentium.

[coder]

OTOH AVX isn't exactly a power-friendly instruction set ... if you want 6W TDP, you gotta sacrifice some stuff.

They could still split them in half and execute them as 2x 128-bit parts. Didn't AMD do that in Zen1? I know Pentium did that with SSE, in the Pentium 4.

In terms of area, AVX bloats the register file, but I wonder if that's even enough to bother about.

Anyway, let's not forget this is a 10-way core with 6-wide decode! So, we're not exactly talking about a microcontroller or IoT core. And its ancestors had SSE/SSE2 going at least as far back as the 22 nm days, so you'd expect at least basic AVX/AVX2-support wouldn't be completely off the table.

In case you missed it: https://en.wikichip.org/wiki/intel/m...t#Architecture

[coder]

Yeap, unfortunately they are indeed small cores - the single threaded performance of those is pretty poor compared to even a Pentium.

Check out the graph I posted on the first page. They are showing Tremont offers up to about 67% of the ST performance of a Sunny Cove core.

Considering its power envelope, that's substantial.

[coder]

You know, there is actually a way to test it out to some degree. With an AMD Ryzen retail, on an x570 pro mobo or similar, you try vanilla rowhammer (not ECCploit) ... If you're successful at vanilla rowhammer, it means that ECC doesn't work. If you're not successful ... well, you haven't really learnt much.

A common tactic is to just overclock the RAM until you start getting memory errors, and then see if ECC corrects and reports them.

Another option is to try an ECC DIMM that's known to be defective.

Probably the best (and most difficult) is to use the kernel-support for injecting faults, and see if they're reported. A guy in the RealWolrdTech thread where Linus posted was talking about this, but hadn't updated with his relults, last I checked.

BTW, someone posted a link to an article showing that rowhammer is still possible (though much more difficult), even with ECC. But, what should be a lot easier is to try rowhammer and see if it causes an ECC event. That's all you need -- for it to trigger a correctable error. However, if your ECC support is indeed broken, then I guess you'd get a successful rowhammer, instead.