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  • #71
    Originally posted by curaga View Post
    @eltomito: It's quite a bit easier to write vector code for Power compared to x86. Whether it runs faster (vs C on the same cpu) depends on many things, I've seen both cases.
    Comparing AVX to AltiVec, or what?

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    • #72
      Originally posted by Dawn View Post
      Rumors have been floating around for ages that SW26010 is MIPS or Alpha, but it's actually a domestic ISA (SW64.) Dongarra's overview of the system mentions this in passing, as does the PRC-origin literature on the subject.
      I am not convinced, that is a complete "off-MIPS" arch..
      For sure is has a lot of elements from MIPS..

      Since their Loongson line is their to stay and to improve, last version will popout in October..
      The Line 3A4000, 3B4000.
      3C5000 will be produced in 16nm TSMC( instead of France/Italy STMicroelectronics )..

      They continue to refine it, with power full instructions there, and its used for Government and Military for sure, the last version even include MIPS64r6 instructions..

      I am not saying that is 100% MIPS, but it should bear a lot from it, I think..

      Comment


      • #73
        Originally posted by coder
        Comparing AVX to AltiVec, or what?
        All x86 vector extensions to all power9, so MMX/SSE*/AVX to Altivec/VSX/power8/power9. The Altivec-style code is so much more readable and understandable, and it has some things that are hard/missing/PITA to do on x86 (fast any to any permutation for one). Naturally x86 does have some instructions power does not have equivalents for, as well.

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        • #74
          Originally posted by ms178 View Post
          While it is a good first step to stay relevant in the market as an open ISA, other steps need to follow, e.g. I haven't seen a different POWER CPU implementation yet which isn't designed by IBM. There are still no low-cost systems for developers. But I wonder if the European Processor Initiative (EPI) had chosen ARM/RISC-V if that announcement would have been made a year ago as POWER was a viable option as well.
          To be honest,
          I think EU Leadership "lost the power to rule" a lot of time ago..

          Spain designed the Leon Core, a ultraSparc v8, it took-off, but never materialised in mainstream equipment..
          And worst even, EU left a Nordic company buy the company that produce it,
          And now EU have the guts, to complain that the Nordic's guys are robing them with 10k € plus a piece, for a development board, nothing too powerful, but the CPU is Rad resistant( nowadays ), its for space,

          Even though that were there versions not Rad equipped of LEON3, they charged the same..

          Green Waves, have been developing for Risc-v, with the help of STMicroelectronics, which is nice..
          But when they got what they wanted too, they jumped for TSMC...omg.
          I think, any time a company is investing in something, should obligate the product to be then manufactured there, or you have to pay in full, for that company services..

          Like this there are tons of other non-sense stories in EU..
          Has per the European Processor Initiative...

          Like you see in the name of the project,
          Its a European Processor initiative.. it wouldn't make any difference if IBM released the Power Architecture sooner..
          Because its a European Initiative..
          Probably the Team that will Design the first ARM version will be the France Team, that designed the ARM Cortex-A73..

          The focus is in Powerful hardware, with Ultra Low Power Consumption...
          Even if the project was not to design a European processor,
          Power 8/9 couldn't work there, since it consumes lot of power..

          Energy in Europe, costs a Lot of money, its a major Issue..

          When you buy a CPU and it consume 65W of power...you almost decline it,
          Because its a monstrosity of power consumption( by European Standards.. ), you eventually will end buying it if you don't find a alternative for it..

          Comment


          • #75
            Originally posted by tuxd3v View Post

            Like you see in the name of the project,
            Its a European Processor initiative.. it wouldn't make any difference if IBM released the Power Architecture sooner..
            Because its a European Initiative..
            Probably the Team that will Design the first ARM version will be the France Team, that designed the ARM Cortex-A73..

            The focus is in Powerful hardware, with Ultra Low Power Consumption...
            Even if the project was not to design a European processor,
            Power 8/9 couldn't work there, since it consumes lot of power..

            Energy in Europe, costs a Lot of money, its a major Issue..

            When you buy a CPU and it consume 65W of power...you almost decline it,
            Because its a monstrosity of power consumption( by European Standards.. ), you eventually will end buying it if you don't find a alternative for it..
            There are some presentations and white papers available on the EPI and I've read and seen some. They are quite pragmatic about the "Built in Europe" part. It is a long-term vision to have as much European DNA in there as it makes sense economically. But the reality is that TSMC is the best foundry out there and that you can get some important IP for low cost on the open market. As they want to be successful on the market, they need to accustom to these realities.

            You are right, Power 8/9 might not have suited their needs. But the POWER ISA itself does let you build high power and low power chips, as they are used in embedded systems as well (thus the POWER ISA would have suited EPI's goal to go into servers and the automotive sector with the same ISA). It is also battle tested in useage around the world, which RISC-V is not yet. At least in my view that open licensing announcement would have provided a great argument to go POWER first and RISC-V later if they saw a benefit with going the RISC-V route at all later on. They now had to deal with ARM licensing and what to do with their custom built IP around it (and to negotiate an agreement what they are allowed to port over to RISC-V later).

            ARM still has an edge with the broader software infrastructure though (at least if compared to POWER and RISC-V). Also new ISA features like SVE2 and TSX might be very useful for their HPC needs. But as ARM comes from the low-power side, I want to see how good high-power implementations perform. At least Linus Torvalds ranted about Cavium's server implementation on the LKML some weeks ago (and their lack of scalability / interconnect to be more intelligent with many-core implementations).

            Comment


            • #76
              Originally posted by curaga View Post
              All x86 vector extensions to all power9, so MMX/SSE*/AVX to Altivec/VSX/power8/power9.
              The reason I ask is that MMX and SSE are 2-operand, while AVX is 3-operand. So, if your experience was just based on MMX and SSE, that wouldn't necessarily apply to AVX.

              Originally posted by curaga View Post
              The Altivec-style code is so much more readable and understandable,
              Because of instruction names, the type of operations, or ???

              Originally posted by curaga View Post
              and it has some things that are hard/missing/PITA to do on x86 (fast any to any permutation for one).
              Well, SSSE3 added pshufb.

              That said, it seems that this capability wasn't entirely carried-forward to AVX:

              https://software.intel.com/en-us/blo...2-permutations

              FWIW, I don't like Intel's vector instruction names. I wrapped their intrinsics with my own C++ templates, which add type safety and ease portability to other ISAs (one example being ARM NEON).

              Comment


              • #77
                Originally posted by tuxd3v View Post

                Well,
                The problem is that Taiwan is China..
                It was passed to UK ruling because of 2 or 3 wars that UK had with China at that time when UK was based in India..

                It's a complicated subject but , only because UK got it, in an Agreement, doesn't mean it his not China..
                And China could use Taiwan against US/UK..

                Because the fuss is all about TSMC been there..
                You're thinking of Hong Kong.

                Comment


                • #78
                  Originally posted by L_A_G View Post
                  EDIT: Looks like I misread a whole bunch there. The wikipedia article had a reference to the Loongson architecture, which is a Chinese MIPS64 series of processors so I may have remembered incorrectly or then they've scrubbed mention of the main control CPU being MIPS based as it right now states that it's based on some unspecified RISC ISA.
                  Thanks for double checking!

                  Comment


                  • #79
                    Originally posted by ms178 View Post
                    There are some presentations and white papers available on the EPI and I've read and seen some. They are quite pragmatic about the "Built in Europe" part. It is a long-term vision to have as much European DNA in there as it makes sense economically. But the reality is that TSMC is the best foundry out there and that you can get some important IP for low cost on the open market. As they want to be successful on the market, they need to accustom to these realities.

                    You are right, Power 8/9 might not have suited their needs. But the POWER ISA itself does let you build high power and low power chips, as they are used in embedded systems as well (thus the POWER ISA would have suited EPI's goal to go into servers and the automotive sector with the same ISA). It is also battle tested in useage around the world, which RISC-V is not yet. At least in my view that open licensing announcement would have provided a great argument to go POWER first and RISC-V later if they saw a benefit with going the RISC-V route at all later on. They now had to deal with ARM licensing and what to do with their custom built IP around it (and to negotiate an agreement what they are allowed to port over to RISC-V later).

                    ARM still has an edge with the broader software infrastructure though (at least if compared to POWER and RISC-V). Also new ISA features like SVE2 and TSX might be very useful for their HPC needs. But as ARM comes from the low-power side, I want to see how good high-power implementations perform. At least Linus Torvalds ranted about Cavium's server implementation on the LKML some weeks ago (and their lack of scalability / interconnect to be more intelligent with many-core implementations).
                    You have a lot of fair points there..
                    But the Accelerators for AI, etc will be RISC-V, which is nice because will bring Independence, and the capability to do whet ever you want too..
                    These type of accelerators, will gradually change with time,
                    As the needs will change, I am talking about specialisation, and its a good thing..

                    In the Automotive massive Accelerators,
                    I think KalRay's,accelerators are a very nice proposition, you get massive processing power for the future self driven cars, etc, at very low power consumption, they are a key point..

                    As per the base CPU,
                    Their are a low of CPU designs in Europe, probably they are less known in the west, and they should be taken in consideration too.
                    Basing in Power8/9 will be a problem for power Consumption,
                    As the Idea, is processing power, at very low power usage..

                    The ARM CPU, will not be a standard CPU, will but a derivation of ARM IP Philosophy..
                    For what I understand..
                    Since ARM IP is massively used nowadays,
                    A lot more than power8/9, its price will be a lot smaller, and they hope to achieve low power consumption with it.. relying then in accelerators( Risc-V or Kalray's ), for Computation.
                    For low power Internet of Things, I think Wave Computing has a good Risc-V Solution too..because they beat ARM in Efficiency, in ultra low power..

                    I see,
                    There are indeed Automotive versions by STMicroelectronics SPC5 ppc 32 bit processors, also TriCore from Germany..
                    I am not saying that everything should be ARM related,
                    Since they lack the capability that KAlRay's have for Self-Driven Cars massive processing needed, on any other Accelerator type..

                    The Idea, a ultra low Power CPU, with specialised Accelerators around..
                    Russia is following the same path on the accelerators Idea for example with MALT ManyCores Acelerators.. but in their case for now it seems( Encryption Security,NoSql Databases, and so on.. ), their focus are a bit diferent..

                    Comment


                    • #80
                      Originally posted by coder
                      Because of instruction names, the type of operations, or ???
                      Human-readable naming, type safety, and in general it's more like writing C and less like writing asm. Compare scalarproduct_int16, a simple function in ffmpeg: https://github.com/FFmpeg/FFmpeg/blo...ppc/audiodsp.c https://github.com/FFmpeg/FFmpeg/blo...6/audiodsp.asm

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